[fix] Use MSC for checking checkpoint existence - #4251
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@mcore-oncall hi, could you please take a look? |
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hi @chtruong814 sorry to bother you, maybe you can help me get this merged? |
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@mcore-oncall hi, could you please take a look? |
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Thanks for the fix — verify_checkpoint was indeed missing the MSC branch that the rest of this file already has (core.py:63, validation.py:224 in verify_checkpoint_and_load_strategy, serialization.py:379, strategies/common.py:94,156), so loading from an msc://… URL would falsely report the checkpoint as missing.
A couple of small suggestions inline to keep the new block consistent with the surrounding conventions in this file.
Signed-off-by: Pavel Gein <pavel.gein@gmail.com>
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@asolergi-nv thanks for the review. There is actually a test in the file tests/unit_tests/dist_checkpointing/test_msc.py, and it uses a MSC, but the problem with this test is that it uses only local paths, so it passes without fix. |
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Hi @asolergi-nv could you, please, help to land this PR? I don't know anyone else to ping... |
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/ok to test 62e1b40 |
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Tests failures seems unrelated |
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/ok to test 207cd98 |
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🔄 Merge queue validation started! You can track the progress here: https://github.com/NVIDIA/Megatron-LM/actions/runs/25952778302 |
* origin/main: (138 commits) Refactor CUDA graph API: decompose cuda_graph_scope into full_iteration impl, inference scope, and per-layer capture modules (NVIDIA#4292) Add high-priority A2A stream and HybridEP preprocessing SMs (NVIDIA#4694) add is_torch_min_version in fsdp src (NVIDIA#4812) [Main][feat] Support A2A Overlap for Megatron-FSDP (NVIDIA#3797) Reorder mtp_post_process after attention backward in 1F1B schedule plan (NVIDIA#4695) [fix] Use MSC for checking checkpoint existence (NVIDIA#4251) Combine GEMM + SwiGLU fused MLP PRs (3890, 4071, 4095, 4219, 4311, 4324) → main (NVIDIA#4636) Strengthen test_checkpoint to verify distributed checkpoint behavior (NVIDIA#4711) Disable MSC by default; opt in via --enable-msc (NVIDIA#4629) additional tests for nvrx (NVIDIA#4522) Update copy-pr-bot.yaml [skip ci] ci: tolerate git-gc race in /home/runner chown after checkout (NVIDIA#4808) Inference: Optimize Prefill Engine Steps for Nemotron (NVIDIA#4764) chore: Update nightly tests golden values (NVIDIA#4805) ci: Update workflow to use same commit for building docker image and running tests (NVIDIA#4787) Update owners (NVIDIA#4794) Bump nvidia-modelopt>=0.44.0 (NVIDIA#4803) fix tokenizers in respect to newer transformers (NVIDIA#4608) Use Protocols to type-check linear_proj submodules of Attention (NVIDIA#3434) Fix recompute checkpointing + training CGs (NVIDIA#3919) ... # Conflicts: # megatron/core/transformer/moe/moe_utils.py
Signed-off-by: Pavel Gein <pavel.gein@gmail.com> Co-authored-by: Antoni-Joan Solergibert <asolergibert@nvidia.com>
Signed-off-by: Pavel Gein <pavel.gein@gmail.com> Co-authored-by: Antoni-Joan Solergibert <asolergibert@nvidia.com> Signed-off-by: yhgalaxy <yhgalaxy@outlook.com>
Signed-off-by: Pavel Gein <pavel.gein@gmail.com> Co-authored-by: Antoni-Joan Solergibert <asolergibert@nvidia.com> Signed-off-by: Jon Barker <jbarker@aws-cmh-slurm-1-vscode-02.cm.cluster>
Signed-off-by: Pavel Gein <pavel.gein@gmail.com> Co-authored-by: Antoni-Joan Solergibert <asolergibert@nvidia.com>
Signed-off-by: Pavel Gein <pavel.gein@gmail.com> Co-authored-by: Antoni-Joan Solergibert <asolergibert@nvidia.com> Signed-off-by: Dmytro Pykhtar <dpykhtar@nvidia.com>
What does this PR do ?
This PR fixed behaviour, when MSC path is used
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