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[AMD] ci: move the miles nightlies from rocm700 to rocm10 - #37495

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bingxche merged 3 commits into
sgl-project:mainfrom
XinyuJiangCMU:pr/miles-rocm10-nightlies-20260901
Sep 10, 2026
Merged

bingxche merged 3 commits into
sgl-project:mainfrom
XinyuJiangCMU:pr/miles-rocm10-nightlies-20260901

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@XinyuJiangCMU

@XinyuJiangCMU XinyuJiangCMU commented Sep 2, 2026

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The Miles rocm700 variants are retired (radixark/miles#2854, merged). ROCm 10 replaces that track and no longer needs the ROCm 7.2 memory workarounds.

Modifications

  • Replace the rocm700 nightly build workflow with a rocm10-mi35x one: same 12:00 UTC cron, builds from radixark/miles@main.
  • Move scheduled Miles testing from rocm720 to rocm10: same 17:30 UTC cron, same suites and runners.

rocm720 images continue to build nightly; only scheduled testing moves to ROCm 10.


CI States

Latest PR Test (Base): ✅ Run #34364470024
Latest PR Test (Extra): ❌ Run #34364469586
Latest PR Test (AMD ROCm 10): ➖ No AMD PR run found for this commit.

Co-authored-by: Zhiyao Jiang <jessicajiang324@gmail.com>
@bingxche

bingxche commented Sep 2, 2026

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Validation update (ROCm 10 Miles):

…s main

radixark/miles PR 2854 merged, so the rocm10-mi35x variant now exists on
main. Point the build workflow back at radixark/miles@main and restore
both crons (12:00 UTC build, 17:30 UTC test) so the ROCm 10 track runs on
the same cadence the rocm720 nightlies did.
@bingxche
bingxche merged commit 106cc56 into sgl-project:main Sep 10, 2026
95 of 99 checks passed
pllimax added a commit to pllimax/sglang that referenced this pull request Sep 10, 2026
* origin/main: (27 commits)
  [Simulator] Give the OFFLINE/BLOCKING comparison tolerances real headroom (sgl-project#38732)
  [Config] msgspec.Struct for the config tier (sgl-project#38753)
  [AMD] ci: move the miles nightlies from rocm700 to rocm10 (sgl-project#37495)
  [Config] One writer for the declaration stash; no exception to the write seal (sgl-project#38752)
  docker(xpu): drop redundant setvars.sh from torch_memory_saver RUN (sgl-project#38665)
  [XPU][Fix] Pack device-pointer tables as uint64 to avoid 64-bit address overflow (sgl-project#35051)
  [CI] Temporarily disable GB300 tests (sgl-project#38770)
  [diffusion] feat: spill large tensors over shared memory like numpy arrays (sgl-project#38656)
  [diffusion] refactor: refactor utility ownership and document helper placement (sgl-project#38699)
  [NPU]Support GLM5.2 and FP8 DSA&Indexer kvcache for 950 (sgl-project#38250)
  [CI] Answer unrecognized slash commands instead of skipping silently (sgl-project#38736)
  [AMD] Parallelize aiter spec-decode KV index building over token blocks (sgl-project#37659)
  [DSv4] Integrate TRT-LLM DSv4 Attention for SM100/103 (sgl-project#30805)
  Add Opt-In for GLM-5.3 Flash breakable prefill CUDA graphs (sgl-project#38522)
  [CI] Install helion 1.4.0 for the KDA Helion kernel tests (sgl-project#38688)
  [Rust] Gate health on startup warmup completion (sgl-project#37994)
  [HiCache] Replace skip_lock_node_ids with a segment lock protocol (sgl-project#36848)
  feat: add optimized Domino rollout to DFlash V2 (sgl-project#36899)
  [CI] Add /run-full-ci and /run-extra-ci slash commands (sgl-project#38734)
  [Model] Support GLM-5.3 Flash NVFP4 loading (sgl-project#38621)
  ...
mqhc2020 pushed a commit to mqhc2020/sglang that referenced this pull request Sep 15, 2026
…t#37495)

Co-authored-by: Zhiyao Jiang <jessicajiang324@gmail.com>
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2 participants