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[DeepSeekV4][PCP] Enable context-parallel prefill for hybrid KV and MegaMoE - #43809
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maybe break into several prs? |
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https://paste.ubuntu.com/p/6hzxMGRfMH/ this is for turning on enable cache + pcp2 +maga moe (enable prefix cache support on continues pr did not submit yet) https://paste.ubuntu.com/p/swyG56pXbQ/ baseline
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Signed-off-by: roG0d <baonudesifeizhai@gmail.com>
Signed-off-by: roG0d <baonudesifeizhai@gmail.com>
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Purpose
#40902
Implementation summary:
Added PCP-aware hybrid KV handling for DeepSeekV4, covering MLA / SWA / C4 / C128 block and slot mapping.
Added PCP merge for sparse prefill attention: each PCP rank computes local partial attention, then merges LSE/output globally and applies attn_sink only once.
Added a MegaMoE PCP token-shard path: after attention, each PCP rank runs router / MegaMoE / shared expert only for its local token shard, then all-gathers full hidden states for the next layer.
Main challenges:
DeepSeekV4 uses multiple KV layouts with different block sizes and compression ratios.
C4/C128 compressor states need global PCP merge, not local-only updates.
attn_sink must not be applied independently on each PCP rank.
Naive PCP duplicated MoE work across ranks, causing large overhead.
The MoE token-shard path had to be wrapped as a custom op to work cleanly with CUDA graph / torch compile.
tp =8 +maga moe:
start:
res : https://paste.ubuntu.com/p/mcQrbwqVN3/
tp =4 pcp =2 maga moe:
MODEL=/root/model/DeepSeek-V4-Pro
res: https://docs.google.com/document/d/1upWKu1zhqfJpRG9n-fdQA8k3RhNeIxIuh9FJNysN_gQ/edit?tab=t.0
tp=4 dp =2 +maga moe : https://paste.ubuntu.com/p/mG2dDQrVKp/
lm eval:
Test Result
Essential Elements of an Effective PR Description Checklist
supported_models.mdandexamplesfor a new model.