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The existing TorchProfilerWrapper builds a torch.profiler.schedule(...) when warmup_iterations or wait_iterations is set, but hardcodes repeat=1 — so the schedule can only fire one active window per /start_profile. For long-running benchmarks (e.g. 30-min agentic-coding replays) where the workload's behaviour evolves over time (KV cache pressure, context growth, store-tier balance), a single trace at one moment isn't very informative. Exposing `repeat` lets the schedule fire N short windows interspersed across the run, each producing its own trace file via on_trace_ready, so you can compare forward-step kernel mix and latency at different points in a single benchmark. Adds `ProfilerConfig.repeat_iterations` (default 1, preserving existing behaviour) and threads it into the schedule. Adds two validator warnings: combining repeat_iterations > 1 with max_iterations > 0 leads to truncated later cycles, and repeat_iterations > 1 needs a positive wait or warmup to actually enable the schedule. Example: --profiler-config.wait_iterations 900 --warmup_iterations 2 --active_iterations 1 --repeat_iterations 10 captures one forward step every 900 engine iters, ten times, all from a single /start_profile call. Signed-off-by: GirasoleY <girasoley@inferact.ai>
Previously, MLA attention blocked the combination of FP8 KV cache (kv_cache_dtype=fp8) with DCP > 1 via hard asserts. This patch enables the combination by: - Restructuring the decode Q path to allgather in BF16, then optionally quantize to FP8 post-gather for backends with supports_quant_query_input - Replacing cp_gather_cache (dtype-strict) with gather_and_maybe_dequant_cache for FP8 KV cache in the prefill DCP gather path - Passing k_scale through to the DCP prefill path (was hardcoded None) - Adding a clear guard for the unsupported use_fp8_prefill + DCP > 1 case - Adding FP8 DCP test parameterization to test_context_parallel.py Signed-off-by: grimulkan <grimulkan@gmail.com>
Port the additive foundational pieces of vllm-project#33403: - CommonAttentionMetadata: add pcp_allgather_restore_idx and global_num_scheduled_tokens fields; update compute_num_computed_tokens to use seq_lens - global_num_scheduled_tokens under PCP (correct because query_start_loc is local but seq_lens is global). Thread the new fields through unpadded(). - utils.py: add pcp_kv_allgather_and_restore, get_pcp_query_restore_idx, extend_all_queries_by_1, and the fused_pcp_qkv_select Triton kernel that splits Q/K/V into head/tail halves for DualChunkSwap causal load balance. Manual-merge split_decodes_and_prefills to consult global_num_scheduled_tokens / num_computed_tokens for PCP classification while preserving our fork's treat_short_extends_as_decodes and is_prefilling handling. - utils.py: rename internal kwarg cp_kv_cache_interleave_size -> dcp_kv_cache_interleave_size in get_dcp_local_seq_lens (no callers pass this by keyword in our fork). - ops/common.py: fix latent tuple-unpacking bug in _cp_lse_common world_size==1 path. Add dcp_prepare_query / dcp_reduce_output helpers with the DCP=PCP vs DCP=TP*PCP branches. Add DCPTritonContext shim alias. No PCP behavior is wired up yet; this commit only adds dormant infrastructure so downstream phases can integrate cleanly. Co-authored-by: Claude
Foundation for real PCP (Q-token sharding, not the prior PCP-as-DCP-shim): cp_utils.py: introduce PCPManager owning the DualChunkSwap partitioning state. partition_inputs computes local positions / req_indices / restore-index / unpad-mask for this PCP rank. restore_hidden_states all-gathers hidden states post-forward and removes per-request padding. pad_slot_mapping inflates the slot map to cover gathered K/V positions (real -> real slot, padding -> -1). block_table.py: drop PCP from the KV-cache shard calculation. With real PCP, Q is partitioned but K/V are all-gathered before the attention kernel, so each rank inserts the FULL sequence into its cache. Slot-mapping kernel now sees dcp_world_size / dcp_rank (passed via the existing TOTAL_CP_* constexprs for now); MultiGroupBlockTable's max_num_blocks uses dcp_world_size only. gpu_model_runner.py + mla/indexer.py: update the remaining two KV-cache-shard sizing sites (max_num_blocks_per_req) to use dcp_world_size, not get_total_cp_world_size(). get_total_cp_world_size is kept available for code that genuinely needs pcp*dcp. Compiles and existing tests still see DCP-only behavior unchanged (dcp_world_size==1 paths short-circuit). PCPManager is reachable but not yet wired into _prepare_inputs / forward. Co-authored-by: Claude
Instantiate PCPManager when pcp_world_size > 1 and route requests through the DualChunkSwap partition / restore lifecycle: - Persistent input/positions/embeds/mrope/xdrope buffers are now sized to max_padded_num_tokens (max_num_tokens with PCP padding headroom) so the worst-case 2*ws-per-request padding fits. - _prepare_inputs: after building the global positions/req_indices view, call pcp_manager.partition_inputs to overwrite them with this rank's local view, then proceed with the rest of the pipeline using the local counts. Preserves the global cumsum to compute logits_indices into the post-restore global hidden_states. Skips the query_pos.gpu-based GPU positions compute under PCP and copies positions_np directly instead. Asserts PCP != 1 for spec-decode (unsupported), M-RoPE, XD-RoPE. Returns the local token count as the third tuple element. - _build_attention_metadata: thread pcp_allgather_restore_idx and global_num_scheduled_tokens through CommonAttentionMetadata when PCP is on. - execute_model: after model forward on the last PP rank, call pcp_manager.restore_hidden_states to all-gather + reorder + unpad before sampling. - max_num_scheduled_tokens uses pcp_manager.local_num_scheduled.max() for sizing under PCP. Attention kernels are still PCP-naive at this point: mla_attention.py does not yet call pcp_kv_allgather_and_restore. That is Phase 3. Co-authored-by: Claude
…ather) Wire Prefill Context Parallelism into the MLA attention layer: mla_attention.py: - MLACommonMetadata: add pcp_allgather_restore_idx (carried from CommonAttentionMetadata) so the kernel can reorder gathered K/V. - MLACommonPrefillMetadata: add nested PCPMetadata.ChunkMetadata with per-chunk cu_seqlens_q/cu_seqlens_k for DualChunkSwap head/tail FA calls; introduce PrefillKernelMetadata type alias. - MLACommonMetadataBuilder: lazy-init pcp_world_size / pcp_rank; when pcp > 1, build head + tail PCPMetadata chunks with K-side lengths pcp_rank+1 and 2*pcp_world_size-pcp_rank respectively (matches the DualChunkSwap causal pattern); thread pcp_allgather_restore_idx through MLACommonMetadata. Force PCP-incompatible spec-as-decode off by gating supports_dcp_with_varlen on pcp_world_size == 1. - MLAAttention.forward(): under PCP > 1, call pcp_kv_allgather_and_restore on (kv_c_normed, k_pe) BEFORE do_kv_cache_update so subsequent steps see the full sequence. - MLAAttention.forward_impl(): lazy-init pcp_world_size / pcp_rank / dcp_rank on the impl. Skip the local-token K/V slice when PCP > 1 (K/V are already gathered to pcp_world_size * num_actual_toks). When calling forward_mha for prefill, advance the K/V skip by num_mqa_tokens * pcp_world_size since decode rows are replicated. - MLACommonImpl: new pcp_world_size / pcp_rank / dcp_rank fields; _run_prefill_new_tokens_pcp splits Q/K/V with fused_pcp_qkv_select, runs FA twice (head + tail) via the new run_prefill_new_tokens_pcp_chunk backend hook, concats outputs/LSEs, and restores per-request token order via output_restore_idx. - forward_mha dispatches to _run_prefill_new_tokens_pcp when pcp_world_size > 1. prefill backends: - base.py: add run_prefill_new_tokens_pcp_chunk default-raise hook. - flash_attn.py: implement it for the FA prefill backend. This phase wires data flow; the slot_mapping needs to be padded to match the gathered K/V layout (Phase 3b). Co-authored-by: Claude
For PCP correctness, the K/V written into the cache during forward must cover EVERY token in the global sequence (not just this rank's local DualChunkSwap shard) — otherwise subsequent decode iterations cannot attend to the missing positions. _prepare_inputs: - Snapshot the GLOBAL cu_num_tokens / req_indices / positions_np before calling pcp_manager.partition_inputs. - Under PCP > 1, run compute_slot_mapping with the GLOBAL view (upload global GPU positions / query_start_loc temporarily). The block-table slot_mapping buffer now holds the global slot map. The local positions / query_start_loc that follow overwrite those GPU buffers for the rest of the pipeline. - Skip the second (local) compute_slot_mapping when PCP > 1. _get_slot_mappings: - View the slot_mapping buffer at length max(global_total, padded) under PCP, and clear positions past global_total with -1. - Wrap each group's slot_mapping through pcp_manager.pad_slot_mapping, which expands the global-length map into the padded layout the all-gathered K/V kernel writes against (real -> slot, padding -> -1). Co-authored-by: Claude
- FlashAttnMLAImpl.supports_pcp = True (this is the prefill backend used for the FA + MLA + PCP path the Kimi-K2.5 deployment will hit). - FlashMLAImpl.supports_pcp = True for completeness. - FlashMLASparseImpl intentionally left at supports_pcp = False (DSV3.2 sparse decode is not in scope for this rollout). - CudaPlatformBase.check_and_update_config: when prefill_context_parallel_size > 1, downgrade cudagraph_mode to PIECEWISE. Full CUDA graphs cannot capture the cross-rank PCP all-gather as a graph node. Co-authored-by: Claude
- Drop the unused dcp_prepare_query import in mla_attention.py. - Drop the now-unused get_total_cp_world_size import in gpu_model_runner.py (the two remaining callers were rewritten to use get_dcp_group().world_size in Phase 2a). - Sort imports in mla/indexer.py. - Collapse a nested-if into a single condition in split_decodes_and_prefills. - Split a too-long line in _prepare_inputs. ruff check passes on all touched files. Co-authored-by: Claude
The helper sliced ``key[:num_actual_tokens]`` before the cross-rank all_gather. Under PCP + piecewise CUDA graphs, ``num_actual_tokens`` is the cudagraph-padded local count, which can exceed ``local_total``. Gathering that padding would interleave each rank's cudagraph slack into the layout that ``pcp_allgather_restore_idx`` was built against, corrupting the post-restore K/V tensor. Derive the actual per-rank gather size from the restore-index length instead: ``local_count = pcp_allgather_restore_idx.shape[0] // pcp_world_size``. This matches how PCPManager.partition_inputs builds the restore index (``len(all_pos) == pcp_world_size * local_total == padded_total``). Keep ``num_actual_tokens`` in the signature (existing callers) but only use it for a defensive sanity assert. Co-authored-by: Claude
Mirror of tests/distributed/test_pcp_decode_repro.py but for the new
Q-sharded PCP design (Phase 3 of pcp-real). Spawns 2 / 4 gloo workers
on CPU and verifies the property decode-after-prefill correctness
hinges on:
partition_inputs -> per-rank local K/V -> pcp_kv_allgather_and_restore
-> pad_slot_mapping -> cache write == global K/V at every real slot
Covered failure modes:
1. pcp_kv_allgather_and_restore gathering the wrong slice when
cudagraph padding inflates the K/V tensor past local_total. The
test poisons the slack rows with sentinel values; a regression
would surface as those sentinels appearing in K_restored at
real positions.
2. partition_inputs building pcp_allgather_restore_idx such that
the union of per-rank padded positions misses or double-covers
[0, padded_total). The test asserts the restored K/V exactly
equals the constructed global K/V at every real position.
3. pad_slot_mapping misplacing real slots against the unpad mask.
The test reads padded_slot[mask] and padded_slot[~mask] and
asserts the sequential global slot map and -1 fill respectively.
4. The composition of all three: simulate the cache write
pos-by-pos using padded_slot and confirm the resulting cache
equals the constructed global K/V.
Uses two requests, one length divisible by 2*ws (no padding) and one
not (forces the padded-but-not-real branch), so both code paths are
exercised in the same test run.
Co-authored-by: Claude
…ests
Three additions to cover CP attention correctness numerically:
1) tests/v1/attention/test_pcp_qshard_attention.py (NEW)
The natural complement to test_pcp_prefill_qshard.py (data-flow). In
process, FP32 CPU, no distributed: assemble per-rank head/tail FA
outputs at the right global Q positions under DualChunkSwap and
assert exact equality (atol=1e-5) with single-rank causal FA over
the full Q x K. Parametrized over pcp_world_size in {2,4,8},
per-rank chunk in {1,4,16}, num_heads in {1,4,16}, head_dim in
{32,64,128}, plus a multi-request case. 87 test cases, ~9s.
The reference uses Q-aligned-to-end causal masking, matching FA's
varlen convention when cu_seqlens_q < cu_seqlens_k — which is the
exact convention _run_prefill_new_tokens_pcp invokes for the tail
chunk (cu_seqlens_q = chunk per req, cu_seqlens_k = (2W-r)*chunk).
Also adds two tests for get_pcp_query_restore_idx itself: one
confirming the single-request identity case and one confirming the
two-request interleave-back-to-per-request-grouping behavior. These
pin down the contract that downstream code relies on.
2) tests/v1/attention/test_pcp_in_prefill.py (RESTORED)
Restored from git history (commit f98695e9b). Tests the K-shard +
LSE-merge math that the chunked-context-prefill branch
(_context_parallel_compute_prefill_context) still uses under
DCP > 1. Independent from the new Q-shard path but still load-
bearing for DCP correctness.
3) tests/distributed/test_pcp_decode_repro.py (RESTORED)
Restored from git history (commit 29e6c4708). Multi-process gloo
repro of the TP=1+PCP=N decode path; guards against regressing
the AllReduce-merge contract. Still applicable to the new design
since decode-side K/V are gathered the same way.
All 130 PCP-related unit tests pass in 23s.
Co-authored-by: Claude
scripts/pcp_gsm8k_validation.py (NEW): offline harness that mirrors PR vllm-project#28988 / tests/distributed/test_context_parallel.py settings (256 questions, 5-shot, MIN_ACCURACY=0.64) but launches the engine with --prefill-context-parallel-size N. Uses tests.evals.gsm8k.gsm8k_eval.evaluate_gsm8k_offline so it doesn't need a vLLM serve endpoint. FlashInferMLAImpl.supports_pcp = True. The PCP integration lives in MLACommonImpl.forward_impl + forward_mha which FlashInferMLAImpl inherits. forward_mqa (the only method FlashInferMLA overrides) reads from the already-full KV cache after forward()'s pcp_kv_allgather_and_restore + padded slot_mapping write. Without this, the auto backend selector chose FlashInferMLA on Blackwell (only sm10-compatible MLA backend) and the cp_utils compatibility check failed. gpu_model_runner._dummy_run profile call now passes max_num_tokens // max(pcp_world_size, 1) so each rank profiles its post-partition local workload rather than the global token count. Matches the patch's reference behavior. Known remaining issue (not fixed here): on GB200 (sm 10.0) with PCP > 1, the FIRST dummy forward (after the per-rank-sized profile run) trips cudaErrorInvalidValue at the torch.empty workspace pre-alloc in MLAAttention.forward_impl's attn_metadata=None branch (line 670). Shape (16384, 16, 256) BF16 ~= 66 MiB, well within budget; the empty alloc itself shouldn't fail. The pre-allocation is a profile-time hint, not load-bearing, but the error makes the engine never reach KV-cache initialization. The same setup with PCP=1 (TP=1, no PCP) runs gsm8k to 4/4 correct, so the core engine + FlashInferMLA path is healthy. The plan flagged "GB200/SM10 untested" as a risk for both PR vllm-project#28988 and PR vllm-project#33403 (the design base). This is exactly that — needs an interactive debug session on the GB200 to pinpoint which earlier async CUDA op poisoned the context. Co-authored-by: Claude
…f-by-one Two real bugs surfaced while debugging the GB200 PCP=4 startup crash: 1) gpu_model_runner._get_slot_mappings entered the PCP padding branch even from _dummy_run (compile/warmup, memory profile), where PCPManager.padded_total is still 0 because partition_inputs has never been called for the dummy batch. With padded_total=0, pcp_manager.pad_slot_mapping(...) returns the input unchanged — and we sliced the input to global_real_tokens=0, so the slot map came back EMPTY. Then concat_and_cache_mla was called with a non-empty K/V (the dummy tokens' kv_b_proj output) and an empty slot_mapping, which corrupted the CUDA context. The next CUDA op (a torch.empty workspace alloc) surfaced as cudaErrorInvalidValue. Fix: gate the PCP branch on `pcp_manager.padded_total > 0` so non-PCP-iteration callers (dummy_run) fall back to the local slot_mapping path. Now layers 0..26 of pass 1 (no KV cache yet) AND pass 2 (KV cache live) both complete without crashing. 2) fused_pcp_qkv_select used `(max_dim + DIM_BLOCK_SIZE) // DIM_BLOCK_SIZE` to size `n_dim_block`, which over-allocates by one block. For DeepSeek-V2-Lite-Chat (q_head_dim=192, DIM_BLOCK_SIZE=64), this launches 4 dim blocks instead of the correct 3 (ceil(192/64)). The fourth block has dim_off=192..255 — entirely masked for Q/K/V — but masked-out lanes in tl.store still COMPUTE the pointer (ptr + dim_off), and that address is OOB. Blackwell traps these as cudaErrorIllegalAddress even though the store itself is predicated off. (Hopper appears more permissive; the upstream PR vllm-project#33403 hasn't been tested on sm10 either.) Fix: standard ceil division for n_dim_block. After both fixes, startup completes through profile, KV cache init, and warmup. Generation still hits an IMA inside _fused_pcp_qkv_select_kernel under real input, surfaced at engine shutdown rather than the kernel call site. Likely another OOB in the same kernel; investigation continues. Co-authored-by: Claude
The V buffer has v_head_dim = 128 rows while K/Q have qk_head_dim = 192. With DIM_BLOCK_SIZE = 64, the kernel processes 3 dim blocks (after the ceil-division fix) — block 2 covers dim_off = 128..191 which is fully masked for V. Although v_d_mask correctly says "don't write", Triton still computes the destination pointer (ptr + dim_off, where dim_off can be up to 191 but the V buffer row size is only 128); on Blackwell that masked-out store address is OOB and traps as cudaErrorIllegalAddress. Fix: gate the V load + both V stores on `dim_block_id * DIM_BLOCK_SIZE < v_head_dim`, so blocks past v_head_dim do not touch any V pointers at all. K load/stores remain unconditional since their head_dim covers the full dim_block range. After this fix the kernel still trips an IMA at run time on real data (seems to be elsewhere in the kernel or in the surrounding pointer math under multi-request batches); investigation continues. Co-authored-by: Claude
Set VLLM_PCP_QKV_SELECT_BACKEND=torch to bypass the Triton fused kernel and use a pure-PyTorch slice + cat implementation instead. Slower (one cat per output per request) but backend-agnostic — works around the masked-OOB-pointer issue the kernel hits on Blackwell sm 10.0 (the plan's pre-noted "GB200 / SM 10.0 untested" risk). This is essentially the *original* PR vllm-project#28988 design — that PR shipped gsm8k-validated PCP using torch.index_select. PR vllm-project#33403 then added the Triton kernel as a perf optimization on top, in commit ae8e5f3 "Perf: Fused qkv select to reduce op launch overhead for pcp prefill". The math (per-request chunk = pcp_tokens // 2, K head = first (pcp_rank+1) chunks of allgathered K, K tail = first (2*ws - pcp_rank) chunks, etc.) is identical between the two PRs. With VLLM_PCP_QKV_SELECT_BACKEND=torch the engine reaches end-to-end prefill+sampling on GB200 (no more cudaErrorIllegalAddress). gsm8k output correctness is still being validated separately. A unit-test inline check verifies the fallback matches the kernel's expected output layout for a 2-request, pcp_world_size=4, pcp_rank=2 case. Co-authored-by: Claude
…ther
MLAAttention.forward() did the PCP K/V allgather under use_direct_call,
but the alternative dispatch path (use_direct_call=False, which is the
chosen path on Blackwell because current_platform.opaque_attention_op()
returns True) routes through torch.ops.vllm.unified_mla_kv_cache_update
and torch.ops.vllm.unified_mla_attention_with_output. Those ops call
straight into the layer's impl.do_kv_cache_update and forward_impl
WITHOUT the PCP allgather, so:
* do_kv_cache_update receives the LOCAL (rank's DualChunkSwap slice)
K/V with shape (local_total, ...) but the padded slot_mapping built
by gpu_model_runner._get_slot_mappings has length padded_total =
pcp_world_size * local_total. concat_and_cache_mla then walks past
the K/V buffer, writing garbage K/V into cache slots it shouldn't
own and corrupting the device state.
* forward_impl under PCP > 1 skips the local-token K/V slice on the
expectation that K/V was already gathered. With the gather missing,
forward_mha → _run_prefill_new_tokens_pcp → fused_pcp_qkv_select
receives K/V of size local_total while the kernel/fallback assumes
pcp_world_size * local_total; index math falls off the end → IMA
(Triton kernel) or wrong data slices (torch fallback).
This explains why my earlier theory "the kernel itself is broken on
Blackwell" was only half right: the kernel does have masked-OOB-pointer
issues (the n_dim_block ceil fix and V-block guard from previous
commits) but the proximate cause of garbage output was the unified ops
never running the gather.
Fix: introduce _maybe_pcp_allgather_kv() and call it inside both
unified_mla_kv_cache_update (before do_kv_cache_update) and
unified_mla_attention_with_output (before forward_impl). Path-2 now
matches the use_direct_call branch.
After this, a single short prompt under PCP=4 returns the correct
answer ("Q: What is 2+2?\nA:" -> " 2 + 2 = 4\nThe answer is 4.").
Longer prompts and batched gsm8k still degrade after the first few
tokens (next debug step), but the first generated token is correct
now — a clean signal that prefill produces sensible logits and the
remaining bug is in cache state or decode K/V flow rather than in
the path-2 plumbing.
Co-authored-by: Claude
Under PCP-real (Q sharded, K/V all-gathered before cache write), each
rank stores the FULL sequence in its KV cache — PCP does NOT shard
the cache. Only DCP does. The scheduler's
SingleTypeKVCacheManager was inflating its effective block_size by
``dcp_world_size * pcp_world_size`` (the old PCP-as-DCP-shim
assumption), causing it to under-allocate physical blocks for
sequences whose global length crosses a logical-block boundary.
Concretely on Blackwell with DeepSeek-V2-Lite-Chat (block_size=32),
a 41-token prefill needs ceil(41/32) = 2 blocks. Pre-fix: scheduler
saw effective block_size = 32*4 = 128 → allocated 1 block → block
1 in block_table is NULL_BLOCK_ID (0) → tokens 32..40 wrote into
slots 0..8 of the null block → cache state corrupt → garbage
generation after the first token.
Fix: in single_type_kv_cache_manager.py, only multiply block_size
by dcp_world_size when computing the per-rank effective block size.
Two sites — __init__ and the find_longest_cache_hit code path.
Also lands diagnostic plumbing kept gated behind VLLM_KV_DUMP_DIR:
- MLAAttentionImpl.do_kv_cache_update writes per-rank, per-layer
k_c_normed/k_pe/slot_mapping snapshots (only the first call per
(rank, layer) that has a real slot, skipping dummy warmup).
- BlockTable.compute_slot_mapping writes a one-shot block_table
snapshot per rank.
- scripts/pcp_kv_cache_diff.py orchestrates a PCP=1 vs PCP=N
comparison and was the script that surfaced this bug.
With this fix, PCP=4's K cache write at layer 0 is byte-identical
to the PCP=1 baseline (verified). Layer 1's K still diverges by
~0.5 (k_c) / ~2.5 (k_pe) — a residual bug in the DualChunkSwap
attention output that propagates to layer 2+, manifesting as
repetition-collapse generations. The block-size fix is independent
and load-bearing for any longer-than-one-block PCP run.
Co-authored-by: Claude
is the bug Adds a diagnostic dump in MLACommonImpl.forward_mha (gated by VLLM_PCP_ATTN_DUMP_DIR) that records the per-rank, per-layer prefill attention output along with the metadata needed to map rank-local rows to global Q positions. scripts/pcp_attn_out_diff.py walks the two dumps (PCP=1 baseline vs PCP=N) and reports the max element-wise diff per global position per layer. Result on DeepSeek-V2-Lite-Chat, prompt of 41 tokens, PCP=4 (VLLM_PCP_QKV_SELECT_BACKEND=torch, prefix-cache disabled): layer 0: max diff = 0.5542 over 40/41 positions layer 1: max diff = 0.2578 over 41/41 positions layer 2: max diff = 1.115 over 41/41 positions layer 3: max diff = 0.5522 over 41/41 positions ... grows monotonically through layer 26 (max 5.2) EVERY global position diverges starting at layer 0 — including position 0, where the causal mask reduces the computation to "Q[0] * K[0] -> softmax -> V[0]" on both sides. We previously proved that K and V at layer 0 are byte-identical between PCP=1 and PCP=4 (via the KV-cache dump diff). The remaining variable that can produce different output for the same K, V at the same Q position is the attention computation itself — i.e., the DualChunkSwap path in _run_prefill_new_tokens_pcp. This rules out: * K/V allgather correctness (proven byte-identical at layer 0) * slot_mapping under PCP (block_table fix lands the right slots) * the path-2 unified_mla op flow (gather is wired through both paths) This implicates one of: * the head/tail FA call's cu_seqlens / causal semantics * the post-FA cat + output_restore_idx assembly * the per-rank output -> per-rank output buffer copy path Position 0's divergence is the smoking gun: under both configurations Q[0] should attend to K[0] only (causal), with identical K[0], V[0], Q[0]. Yet the recorded attention output at position 0 differs by 0.55 in absolute value. So even the simplest head-FA call (rank 0, j=0, where the math is unambiguous) is producing the wrong tensor. Next step is to dump Q (and the per-rank K/V passed into FA) at layer 0 to confirm the inputs to the FA call are themselves identical between PCP=1 and PCP=4 — narrowing the bug to either flash_attn's varlen+causal semantics for Sq!=Sk or our cu_seqlens construction. Co-authored-by: Claude
Three independent bugs were causing PCP=4 prefill to fail on gsm8k: 1. mla_attention.py — chunked-context FA double-counted attention. Under PCP, `prefill_query_lens_cpu` is LOCAL (this rank's share of new Q) but `seq_lens_cpu` is GLOBAL. The naive `seq_lens - local_query_lens` subtraction treated the OTHER ranks' new-Q tokens as "context" and triggered a redundant chunked-context FA in `forward_mha` whose output was merged with the head/tail FA via `merge_attn_states`. Since head+tail FA already attends to the PCP-allgathered K (which already contains ALL ranks' new K), the merge added attention to K positions that were already accounted for, producing garbage logits from layer 0 onward. Fix: under PCP, use `seq_lens - local_q * pcp_world_size` (clamped to 0). For an initial-prefill request this yields context_lens=0 and the chunked-context branch is skipped entirely. 2. gpu_model_runner.py — stale `num_computed_tokens` on second request. The PCP path computes GLOBAL slot_mapping BEFORE the existing H2D copy of `num_computed_tokens` at line ~2174. On the first request the GPU tensor is zero-initialized and happens to be correct; on every subsequent request the GPU tensor still holds the previous request's end-of-decode count, so `positions = num_computed[req] + query_pos` resolves to e.g. [773, 774, ...] instead of [0, 1, ...]. The wrong positions produce wrap-around slot indices that overwrite K/V slots written earlier in the same prefill, so request ≥ 2 reads garbage K during attention and the model collapses into a degenerate decode loop. Fix: sync `num_computed_tokens` H2D inside the PCP branch, before building `positions` for the slot_mapping kernel. 3. kv_cache_coordinator.py + kv_cache_utils.py — `block_size *= pcp_ws`. Same pattern that earlier commit 6a12ea4 ripped out of `single_type_kv_cache_manager.py`. PCP-real does NOT shard the KV cache — each rank stores the full sequence after the K/V all-gather. The two surviving multiplications inflated the coordinator's `self.block_size` and the scheduler/hash block-size by 4× under PCP=4, breaking the `hash_block_size == self.block_size` invariant and the prefix-caching block-hash bookkeeping. With prefix caching disabled the symptom was hidden; with it enabled, the engine asserted on `len(request.block_hashes) >= num_full_blocks` in `block_pool.cache_full_blocks`. Fix: drop the `* pcp_world_size` factor in both files. Validation: gsm8k 5-shot, 256 questions, DeepSeek-V2-Lite-Chat, prefix caching ENABLED, GB200 / Blackwell sm10: PCP=1: accuracy=0.6523 PCP=4: accuracy=0.6914 (PASS, threshold 0.64) PCP=4 marginally outperforming PCP=1 is bf16 reduction-order noise; on single-prompt comparisons layer 0 attention output is byte-identical and later layers drift within bf16 epsilon. Co-authored-by: Claude
Wires `enable_expert_parallel=True` through to `LLM(...)` so the
harness can exercise the PCP × EP composition.
Validated combination on DeepSeek-V2-Lite-Chat (MLA + MoE, 64
routed experts), 256 questions, 5-shot, GB200:
PCP=4, TP=1, EP=1 (no expert sharding): accuracy=0.6914
PCP=4, TP=1, EP=4 (16 experts/rank): accuracy=0.6875
Both PASS the 0.64 threshold. The 0.4% gap is bf16/statistical
noise — within the run-to-run variance observed on PCP=1 alone.
EP confirmed active at runtime:
[EP Rank 0/4] Expert parallelism is enabled. ...
Local/global number of experts: 16/64.
The EP communicator group is constructed in
`vllm/distributed/parallel_state.py:1674-1696` over
`(dp * pcp * tp)` ranks, so it naturally spans the PCP group with
no further wiring needed. No PCP-side changes were required to
enable this combination.
Co-authored-by: Claude
Branch was renamed from `pcp-real` to `pcp-mla` upstream; this commit updates the in-source references for consistency. No functional change — only comments and the test_pcp_prefill_qshard.py docstring. Co-authored-by: Claude
Per upstream review feedback, removes the `VLLM_KV_DUMP_DIR`-gated diagnostic block in `do_kv_cache_update` (both `MLACommonImpl` and `SparseMLAAttentionImpl`) and the matching block_table dump. Also deletes `scripts/pcp_kv_cache_diff.py` since the dump it consumed no longer exists. The dynamic-attribute pattern those blocks used (setting `_KV_DUMP_LAYER_IDS` / `_KV_DUMP_RECORDED` on the backend module via `hasattr` / `setattr`) was producing 14 mypy `[attr-defined]` errors; stripping them resolves the mypy hook. Also includes ruff auto-format + ruff check fixes (11 files reformatted) so `pre-commit run --files <PCP files>` is green. `VLLM_PCP_QKV_SELECT_BACKEND` is intentionally retained — it's a real runtime backend switch (Triton kernel vs torch.index_select fallback) for the fused PCP QKV select, not a debug-only flag. The Triton kernel hits Blackwell-specific OOB masking issues and the torch fallback is the safe path. Co-authored-by: Claude Signed-off-by: girasoley <girasoley@inferact.ai>
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…ed-tokens, --load-format Surface these LLM(...) constructor args via CLI flags so the harness can drive larger models (e.g., Kimi-K2.5-NVFP4) without editing the script. Defaults remain unchanged (each is conditionally added to llm_kwargs only when explicitly set). Co-authored-by: Claude Signed-off-by: girasoley <girasoley@inferact.ai>
Contributor
Author
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This PR is opened by accident, closing this draft — moving the work to the internal repo for now. Will reopen on vllm-project/vllm once in shape. |
Contributor
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Hi @GirasoleY Just came across this PCP work.
By switching PCP KV from replicated to owner-sharded layout, PCP=4 can:
This direction might be complementary to the current vLLM PCP design. We would be happy to collaborate and discuss how to integrate these optimizations with the PCP framework. |
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[Feature][Attention][PCP] PCP support for MLA (Q-shard, full KV)
Summary
Implements Prefill Context Parallel (PCP) for MLA models on top of the
basic PCP scaffolding merged in #28718. The implementation follows a
"PCP MLA" design: prefill Q is sharded across PCP ranks via
DualChunkSwap, but K/V are all-gathered before the cache write so
every rank stores the full sequence. This keeps decode unchanged
(stock decode kernels read canonical-position K/V locally), composes
cleanly with prefix caching, and lets PCP coexist with TP / DCP / EP
on the same ranks.
End-to-end validated on
deepseek-ai/DeepSeek-V2-Lite-Chat(MLA +MoE) at PCP=4 on GB200 (Blackwell sm10.0). gsm8k 5-shot, 256
questions:
The PCP=4 ≥ PCP=1 reading is within bf16 reduction-order noise on a
256-question eval; layer-0 attention output is byte-identical between
PCP=1 and PCP=4 single-prompt traces, and later layers drift within
bf16 epsilon.
What's in the PR
The branch contains the full PCP-MLA feature plus three correctness
fixes that surfaced during validation. Key files:
vllm/v1/worker/cp_utils.py— newPCPManagerowning theDualChunkSwap partition, restore_idx buffers, padded slot_mapping,
and final hidden-state all-gather/restore.
vllm/v1/worker/gpu_model_runner.py— partitioned-input plumbing,GLOBAL slot_mapping computed before partitioning, hidden-state
restore at the end of forward.
vllm/model_executor/layers/attention/mla_attention.py— MLAforward path: K/V all-gather + restore, head/tail FA via
_run_prefill_new_tokens_pcp, chunked-context branch under PCP,metadata builder generating
PCPMetadata.head/tail.vllm/v1/attention/backends/utils.py—fused_pcp_qkv_select(Triton + torch fallback) for the head/tail split,
pcp_kv_allgather_and_restore.vllm/v1/attention/backends/mla/prefill/flash_attn.py—run_prefill_new_tokens_pcp_chunkFA wrapper.vllm/v1/core/single_type_kv_cache_manager.py,vllm/v1/core/kv_cache_coordinator.py,vllm/v1/core/kv_cache_utils.py— block-size / scheduler-block-size bookkeeping that explicitly does NOT scale by
pcp_world_size(PCP doesn't shard the cache).
vllm/v1/worker/block_table.py— slot_mapping kernel keptunchanged; the GLOBAL slot view is what the model_runner passes in
under PCP.
Tests: multi-process Q-shard PCP K/V roundtrip
(
tests/.../test_pcp_kv_roundtrip.py), PCP attention-outputequivalence test, and
scripts/pcp_gsm8k_validation.pyharness with--enable-expert-parallelflag.Design notes
PCP MLA, not PCP-as-DCP-shim
PCP and DCP partition different things:
cache and decode requires an allreduce per token.
all-gather to give every rank the full K/V. Decode is unchanged
per-rank.
The choice prioritizes decode performance and prefix-cache
compatibility over KV-memory efficiency. For MLA (latent dim 576) the
per-layer cache is already small enough that W× duplication is
acceptable on GB200-class HBM. The PR removes leftover
block_size *= pcp_world_sizefactors in three places (kv_cache_coordinator.py,kv_cache_utils.py,single_type_kv_cache_manager.py) thatassumed cache sharding.
DualChunkSwap Q partition
For balanced causal load, each rank gets two non-adjacent chunks:
rank
r(withW = pcp_world_size,chunk = padded_total / (2W))owns global positions
[r·chunk, (r+1)·chunk) ∪ [(2W-r-1)·chunk, (2W-r)·chunk). The implementation does the partition once inPCPManager.partition_inputsand uses two FA varlen calls per layer(head + tail) against the all-gathered K, with
output_restore_idxto undo the split locally before the per-layer K/V cache write.
KV cache layout
Cache stays in canonical position order so decode kernels, prefix
caching, and block-table indexing are PCP-oblivious. The reorder
happens once on the all-gather receive (
pcp_kv_allgather_and_restore)and the slot_mapping is computed against GLOBAL positions before the
Q-side DualChunkSwap partition runs.
Correctness fixes during validation
Three bugs were found and fixed during gsm8k validation (commit
be2eab88d):mla_attention.py—context_lensunder PCP was computed asseq_lens (GLOBAL) - prefill_query_lens (LOCAL), falselytriggering the chunked-context FA branch. Fixed by using
local_q * pcp_world_sizeas the global-new-Q count.gpu_model_runner.py— the PCP slot_mapping ran before theexisting
num_computed_tokensH2D sync, so on requests 2+ theGPU tensor still held the previous request's end-of-decode count,
producing wrap-around slot indices that corrupted K/V. Fixed by
syncing
num_computed_tokensinside the PCP branch.kv_cache_coordinator.py+kv_cache_utils.py—block_size *= pcp_world_sizeviolated the no-cache-shardinginvariant, breaking
hash_block_size == self.block_sizeandasserting in
block_pool.cache_full_blockswhen prefix cachingwas enabled. Fixed by dropping the
* pcp_world_sizefactor.Test plan
Hardware: GB200 (Blackwell sm10.0). FlashInferMLA decode + FlashAttn
prefill. Auto-selected by vLLM under
--attention-backenddefault.Why this isn't duplicating an existing PR
merged 2025-11-19): added the foundational PCP scaffolding (comm
group, CLI args, block-table extensions). This PR builds on top.
2026-05-09 by stale-bot): the earlier MLA-PCP attempt by @FENP.
Closed without merging — the last activity was unresolved merge
conflicts and stale-bot closure rather than a technical block. This
PR is a fresh implementation: validated end-to-end on gsm8k at
PCP=4 and PCP=4+EP=4, with the three correctness fixes documented
above that the earlier PR did not catch.
KV and MegaMoE, open): targets DeepSeek V4 / MegaMoE which is a
different architecture (sparse MLA, hybrid KV). Orthogonal scope.
Differences vs #28988's approach (insofar as I can tell from the
closed PR's description and the design considerations):
is not sharded by
pcp_world_size. The threeblock_size *= pcp_world_sizesites are removed.enable_prefix_caching= Falseworkaround) and with EP=4 active. The two were the bugsfixes (3) above protect against.
_run_prefill_new_tokens_pcpwith afused_pcp_qkv_selectTritonkernel + torch fallback (env var
VLLM_PCP_QKV_SELECT_BACKEND=torch)for backends where the Triton kernel hits Blackwell-specific OOB
masking issues.
Known follow-ups (intentionally not in this PR)
These were flagged during review of the validation work but are
deliberately scoped out to keep this PR focused:
global_num_scheduled_tokensthroughCommonAttentionMetadataso thecontext_lenscalc is exactinstead of using
local_q * pcp_ws(which over-counts by up to2W-1padding tokens). The field already exists onCommonAttentionMetadatafor the GPU view — needs a CPUcounterpart consumed by
MLACommonMetadataBuilder.gpu_model_runner.self.positions/self.query_pos/self.query_start_locfor the temporary global view. The currentreuse is order-sensitive and a refactor risk.
forward_mhacurrently routes sparse MLAimpls through
forward_mqa(the decode path), which under PCPreplicates rather than shards Q. Adding head/tail support for
sparse MLA is a separate PR.
this PR.
AI assistance disclosure
This PR was developed with AI assistance (Claude Code, claude-opus-4-7).
Specifically, the diagnostic workflow that surfaced the three
correctness fixes (KV-cache byte-diff under PCP=1 vs PCP=4, per-layer
attention-output diff, FA input/output dump for cu_seqlens
verification) and the patches were drafted in a Claude session. The
human submitter reviewed every changed line, ran the validation
commands above, and is the technical owner of the change.
Checklist
reviewer can run; the auto-backend selection should pick
FlashAttn-MLA prefill which we've exercised
hitting
enable_chunked_prefill=True(default)pre-commit run --all-filesclean — TODO (need to confirmafter rebase)
🤖 Generated with Claude Code