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Add the cuTile BF16x3 router GEMM with load-time split weights and make it Beam's default router on Hopper and Blackwell, with SGLANG_BEAM_ROUTER_BACKEND=cublas|cutile|torch to choose. FP8 and NVFP4 checkpoints keep the tiny FP32 GEMM when cuTile is on. Needs the tileiras compiler.
This was referenced Oct 20, 2026
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This was referenced Oct 27, 2026
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Motivation
Beam's router multiplies BF16 hidden states by an FP32 gate in each of its 49 MoE layers. #45256 runs it with the tiny FP32 GEMM, the GEMV and the cuBLAS BF16x3 GEMM. This part adds the cuTile BF16x3 router GEMM from #44747 and makes it Beam's default router on Hopper and SM10x Blackwell.
It's optional: without it, Beam serves on the cuBLAS router. It needs the
tileirascompiler, which is #45290. Position 7 of 7 in the merge order below. It is based on #45290's branch (beam-stack-deps-tileiras), so its diff shows only this part.Modifications
kernels/ops/gemm/router_gemm_cutile.py: BF16 activations × FP32 router weights → FP32 logits. It uses a three-part BF16 split of the weight prepared at load time, and combines K tiles with explicit FP32 rounding. Small batches use split-K plus a reduction.models/beam.py:BeamRouterLinearMethodrefreshes the split weight in place after weight loading, so captured graphs see updated weights.split_fp32_to_bf16x3fromops.quantization.bf16x3_split, registered asquantization.split_fp32_to_bf16x3. The old inline splitter, GEMM inventory entry and shared split scratch are removed. This branch carries the canonical module from [Feat] kernels: Beam model support #45254 until its later restack; the existingout=partsuse is unchanged.SGLANG_BEAM_ROUTER_BACKENDchoosescutile(default),cublasortorch.gemm.router_gemm_bf16x3, with a newcutileKernelBackendprovenance value (and the matchingforward_cutilestub inBaseFusedOp), for SM90 through SM10x.This part adds no test code. The recorded GB300 serving runs below belong to earlier revisions.
This part changes 9 files (+340 / -64) relative to its #45290 base branch.
Validation
The splitter migration in
4a8c0cde40has not been reverified, as requested. No tests, lint, pre-commit, import/compilation smoke, GPU checks or benchmarks were run for that update. CuTile arithmetic and model dispatch are unchanged; this was a targeted ownership migration, not a full stack restack.Historical results
The results below come from earlier revisions, before
4a8c0cde40. They do not establish verification of the latest update.b57b5e2286without conflicts ([Feat] parser: Add Beam reasoning, tool calls and response templates (5/7) #45257 merges that main, which includes [Feat] parser: Enrich chat_parsing streaming events #40478; the others are on6efdd33d07).reflection/Beam-1.0-501B-A23B-NVFP4checkpoint and the cookbook GB300 NVFP4 low-latency recipe, serving main6efdd33d07+ [Fix] nccl: Disable graph buffer registration whenever a captured graph can hold a collective #43216, [Feat] parser: Enrich chat_parsing streaming events #40478, [Fix] parser: Accept whole-number floats for integer tool arguments #43941 and [Feat] parser: Add checkpoint-driven response-template adapters #40479 + this stack:/tokenizeall pass. A profiler trace shows the cuTile router kernel running.sglang.kernels.opsdoes not importcuda.tile.tileirasmust share its major.minor withnvidia-cuda-nvccandnvidia-nvvm. cuda-tile rejects mismatched wheels, and the router then fails at startup.Merge order
Each part is based on the one before it, so its diff shows only its own changes. Merge bottom-up; after each part merges, the next part is retargeted to
mainandmainis merged into it. #44747 stays open, unchanged, as the full reference. Merge in this order:nvidia-cuda-tileiras, needed by [Perf] beam: Add optional cuTile BF16x3 router GEMM #45361#45292 (Dynamo and
grpcio-toolspins for the Beam image) is not in the merge order for now.CI States
Latest PR Test (Base): ❌ Run #40183433366
Latest PR Test (Extra): ❌ Run #40183433293
Latest PR Test (AMD ROCm 10): ❌ Run #40183433398