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Fix/compressed tensors nvfp4 hopper - #40022
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| w13_weight = torch.nn.Parameter( | ||
| torch.empty( | ||
| num_experts, | ||
| 2 * intermediate_size_per_partition, |
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This always allocates two projections, but Marlin expects one when is_gated=False, so repacking fails its shape assertion. Could we size this from layer.moe_runner_config.is_gated, or reject non-gated experts explicitly?
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Fixed. w13 is now sized from layer.moe_runner_config.is_gated, for both the weights and the
per-shard global/input scales. Non-gated experts get one shard, which matches what
prepare_moe_nvfp4_layer_for_marlin repacks. A CPU test checks the shapes, and the GPU test below
runs relu2 and silu non-gated experts end to end.
…ackwell nvfp4 and nvfp4a16 compressed-tensors checkpoints could not load below SM100. Both failed during scheme selection, before any weight loading: - nvfp4 hit a hard `NotImplementedError`, since the only fp4 linear scheme (`CompressedTensorsW4A4Fp4`) reports `get_min_capability() == 100` and calls `fp4_gemm` unconditionally. - nvfp4a16 was misrouted by `_is_wNa16_group_channel`, which never checked `type == INT` and so matched any weight-only 4-bit config, including float4. It short-circuits ahead of the fp4 branches and raised a misleading `ImportError` about `W4A16Sparse24`. The FP4 Marlin kernel is weight-only and needs no FP4 tensor cores, so group_size 16 with E4M3 scales -- exactly what nvfp4 stores -- already runs on SM80 and up. Add two schemes that use it, for linear and MoE layers, and downgrade a w4a4 checkpoint to weight-only with a warning when the platform cannot serve it natively, following the existing `_is_fp8_w8a8` -> `CompressedTensorsW8A16Fp8` precedent. Kept separate from the w4a4 classes rather than folded in behind a flag: `get_min_capability` is a classmethod resolved on the instance's class, so a shared class would also lower the SM100 gate guarding the native path. Two conversions are required and neither is optional. compressed-tensors stores the nvfp4 global scale as a divisor (1/scale) while Marlin's `weight_scale_2` is the scale itself; passing it through un-inverted overflows the bf16 exponent-bias multiply (2**119) to inf, which silently zeroes every logit instead of failing. A w4a4 checkpoint also ships `input_global_scale` tensors that a weight-only kernel cannot use, but the expert loader raises `KeyError` on any tensor with no registered destination, so they are registered and then dropped after loading. `check_moe_marlin_supports_layer` is deliberately not called on this path: its `group_size in [-1, 32, 64, 128]` list omits 16 and would reject every nvfp4 layer. The shape constraints it would have checked are asserted directly instead. mxfp4 and mxfp4a16 remain unsupported for linears and now fail with a clean "no compatible scheme was found" rather than the misleading `ImportError`. The dense FP4 Marlin kernel only instantiates `group_blocks == 1` (group_size 16), and its template calls the unparameterized `dequant_fp8_scales`, so E8M0 scales would be silently misdecoded rather than rejected. Lifting that is kernel work, left to a follow-up. Verified on H100 (SM90) with granite-5.0-20b: nvfp4, nvfp4a16, and int4 `pack-quantized` all load with zero dropped experts and generate coherent text; bf16 and both fp8 variants are unregressed. Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
The w4a4 -> weight-only fallback on pre-Blackwell silently drops activation quantization, so the warning naming the substitution is user-facing behavior. Nothing asserted it: the existing tests cover which scheme is selected via has_input_global_scale, but not that the downgrade is reported. warning_once is lru_cache-wrapped, so the message is emitted once per process and the neighboring w4a4 test already triggers it. The test clears the cache on entry and on cleanup to stay independent of execution order. Verified by mutation: removing the warning_once call fails this test and no other. Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
… mismatched NVFP4 global scales - The weight-only NVFP4 linear follows --fp4-gemm-backend: FlashInfer mm_bf16_fp4 for flashinfer_cutedsl / flashinfer_cudnn (auto on SM100) with bf16 activations, FP4 Marlin otherwise (auto on SM80-SM90). Backends without a bf16 x fp4 GEMM and fp16 models fall back to Marlin with a one-time warning; a FlashInfer backend before SM100, or flashinfer_cudnn with cuDNN older than 9.23.1, is rejected at load. - Fused projections (linear q/k/v, MoE gate/up) whose weight_global_scale differ are rejected at load instead of collapsed to one scale, which silently changed the other projections' dequantized weights. This also removes a logger.warning_once call the srt loggers do not have. - Size MoE w13 from moe_runner_config.is_gated: non-gated experts get one shard, matching what the Marlin repack expects. - Add a GPU numeric test driving the MoE scheme end to end against dequantized experts (gated silu, non-gated relu2 and silu), a FlashInfer numeric test on SM100, and CPU tests for backend selection, the cuDNN version gate, non-gated shapes and mismatched global scales. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Could we consolidate these into one CPU scheme test file and one GPU numerical test file? The Linear/MoE selection tests duplicate the config and capability setup and could use subTests. We can also drop the standalone overflow test since the numerical comparison already catches a missing reciprocal, and shorten the repeated docstrings. |
…merically Carries the sgl-project#40022 review fix to the MXFP4 MoE path. w13 was always allocated with two shards, so a non-gated checkpoint (up projection only) failed to load on a shape mismatch. Size w13 and its input scales from moe_runner_config.is_gated, and teach prepare_moe_mxfp4_layer_for_marlin the shard count. Layers without a runner config -- the fused GPT-OSS callers -- keep the gated default. Extend the FP4 MoE numeric test to MXFP4: checkpoint-format experts with raw E8M0 scale bytes, process_weights_after_loading, then the Marlin MoE forward against experts dequantized in PyTorch, for gated silu and non-gated relu2 and silu. Without the fix the two non-gated cases fail; add a CPU test for the non-gated shapes too. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
…one GPU file Address review: merge the linear and MoE scheme tests into test_compressed_tensors_fp4_schemes.py and the numeric tests into test_compressed_tensors_fp4_numeric.py. - Scheme selection is one table of (kind, variant, capability) cases run as subTests over a shared config and capability setup; asserting the exact class per case also covers predicate overlap. - Weight-creation and backend-selection tests share builders and subTests. - Drop the standalone uninverted-global-scale overflow test: the numeric comparison already fails on a missing reciprocal, and now also asserts the output is finite. - Shorten the docstrings. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Carries the sgl-project#40022 review fix to the MXFP4 MoE path. w13 was always allocated with two shards, so a non-gated checkpoint (up projection only) failed to load on a shape mismatch. Size w13 and its input scales from moe_runner_config.is_gated, and teach prepare_moe_mxfp4_layer_for_marlin the shard count. Layers without a runner config -- the fused GPT-OSS callers -- keep the gated default. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Done. The tests are consolidated into one CPU file and one GPU file:
I dropped the standalone overflow test. The numeric comparison already fails on a missing The stacked #41288 and #41289 now add their MXFP4 cases to these same two files instead of |
The weight-only FP4 Marlin path exists for Hopper, but the numeric file was only registered on 1-gpu-small (RTX 5090, SM120) and 4-gpu-b200, so no Hopper runner exercised it. Add the 1-gpu-large (H100) lane. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Carries the sgl-project#40022 review fix to the MXFP4 MoE path. w13 was always allocated with two shards, so a non-gated checkpoint (up projection only) failed to load on a shape mismatch. Size w13 and its input scales from moe_runner_config.is_gated, and teach prepare_moe_mxfp4_layer_for_marlin the shard count. Layers without a runner config -- the fused GPT-OSS callers -- keep the gated default. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Carries the sgl-project#40022 review fix to the MXFP4 MoE path. w13 was always allocated with two shards, so a non-gated checkpoint (up projection only) failed to load on a shape mismatch. Size w13 and its input scales from moe_runner_config.is_gated, and teach prepare_moe_mxfp4_layer_for_marlin the shard count. Layers without a runner config -- the fused GPT-OSS callers -- keep the gated default. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Test-only; no production code changes. - test_parity: list PR107's Python-only lora_backfill_paths alongside lora_path and lora_id; the strict set equality is unchanged. - test_abort_request_prefix: the scheduler fake also binds the real _collect_inflight_batches, which collect_inflight_reqs calls since #42035, with polling off and an empty result queue, as test_weight_versions does. - test_pool_configurator: the retained draft-budget case uses SWARequestCapPoolConfigurator, the name #43202 gave the capped SWA configurator. - test_beam_nvfp4: pin the CUDA capability to SM100 with the Blackwell platform override; compressed-tensors scheme selection queries it directly since #40022. - test_fused_moe_common_utils: the Beam case also expects the tuner's num_layers and dense_layers keys from #28723.
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<1182563586@qq.com> * fix: wait for HiCache load-back before hybrid MLA KV reads (sgl-project#38217) Co-authored-by: zhouzechun <zhouzechun@kuaishou.com> Co-authored-by: alphabetc1 <2508695655@qq.com> * [diffusion] fix: keep the overlay probe from stalling cached startup (sgl-project#43590) * [diffusion] fix: serve whole graphs after offload-during-compile (sgl-project#43631) Co-authored-by: Mick Qian <mickqian@users.noreply.github.com> Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com> * [diffusion] Support LLaDA-Image BF16 generation and editing (sgl-project#37907) * [PD][HiCache] Fold the decode restore outcome into the MIN-reduced KV poll (sgl-project#43562) Co-authored-by: Kevin Flansburg <kflansburg@cloudflare.com> * [diffusion] perf: keep Qwen-Image-2.1 and Ulysses graphs whole (sgl-project#43586) Co-authored-by: Mick Qian <mickqian@users.noreply.github.com> Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com> * [diffusion] perf: keep Cosmos3's fused kernels in the graph (sgl-project#43577) Co-authored-by: Mick Qian <mickqian@users.noreply.github.com> Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com> * [diffusion] fix: Qwen-Image BCG prompt padding misses every graph and attends the pad (sgl-project#43632) Co-authored-by: Mick <mickqian@radixark.ai> Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com> * [diffusion] fix: replay Qwen-Image-2.1 BCG graphs across prompt lengths (sgl-project#43633) Co-authored-by: Mick <mickqian@radixark.ai> Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com> * [diffusion] perf: run the attention section eager under torch.compile for MiniMax-H3 (sgl-project#43634) Co-authored-by: Mick Qian <mickqian@users.noreply.github.com> Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com> * [1/N][DSv41] Enable DP attention with MegaMoE (sgl-project#43228) * [diffusion] comfyui: consolidate FluxAdapter correctness fixes (sgl-project#43490) Co-authored-by: niehen6174 <1639206518@qq.com> * [diffusion] comfyui: consolidate executor conditioning-cache fixes (sgl-project#43492) Co-authored-by: niehen6174 <1639206518@qq.com> * [Scheduler] Keep waiting-prefix LRU refresh consistent across TP ranks (sgl-project#43479) * [Perf] Fuse BF16 writes to native HND KV cache storage (sgl-project#43237) Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com> * [diffusion] Don't report video jobs completed after their outputs are deleted (sgl-project#43084) Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com> Co-authored-by: Xiaoyu Zhang <1182563586@qq.com> * [GDN] Fix CuTe DSL decode to read the [N, HV, V, K] state layout (sgl-project#43332) Co-authored-by: Xiaoyu Zhang <1182563586@qq.com> * [KDA] Support Helion MTP verification and harden prefill, decode (sgl-project#42857) * [AMD]Qwen add Sparse attention to capturing hip graphs (sgl-project#43383) * [Spec] Allow Qwen3.5 backends to opt into packed target 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<4908075+yuan-luo@users.noreply.github.com> * [VLM] fix: repair multimodal VMM lease cleanup and source-stream ordering (sgl-project#43475) Co-authored-by: Mick Qian <mickqian@users.noreply.github.com> * [Diffusion] Add ModelOpt FP8 checkpoint quantization for Pi0.5 (sgl-project#43062) Co-authored-by: Mick Qian <mickqian@users.noreply.github.com> * fix: default Inkling to fa4 on Hopper (sgl-project#35292) * [BugFix][DP] Prevent health checks from perturbing user request routing (sgl-project#35721) Signed-off-by: Phoenix3334 <Phoenix3334@users.noreply.github.com> * [Unified Radix] Invalidate lazy Mamba checkpoints before in-place tracking (sgl-project#43567) * [diffusion] perf: encode LTX video/audio through the shared bounded MP4 path (sgl-project#43656) Co-authored-by: Mick Qian <mickqian@users.noreply.github.com> * [HiCache] Keep storage workers alive on backend exceptions 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drop `SGLANG_DSPARK_FOLDED_SAMPLING` (sgl-project#43668) * [DSpark] Merge the draft TP sync sites into `dspark-draft` (sgl-project#43669) * [DSpark] Add `SGLANG_DSPARK_USE_GREEDY_DRAFT`, an argmax draft accepted as one-hot (sgl-project#43670) * [DSpark] Apply `SGLANG_SIMULATE_ACC_LEN` inside the accept instead of switching paths (sgl-project#43623) * [diffusion] fix: shard Qwen-Image adaLN modulation and text FFN under TP (sgl-project#43691) * [diffusion] perf: layerwise offload for the LTX-2.5 Gemma-4 text encoder (sgl-project#43683) * [diffusion] perf: split and batch LTX-2.3 one-stage guidance passes under CFG parallel (sgl-project#43684) Co-authored-by: Mick Qian <mickqian@users.noreply.github.com> * [Fix] Initialize BF16 GEMM dispatch in the one-batch benchmark (sgl-project#43702) * Fix Mistral-native format detection when the Hub is unreachable (sgl-project#43446) * [MoE] Skip block-padding rows in the TMA down activation and quant (sgl-project#42212) * [MemCache] Split the SWA mapping move out of locked-full recovery as `RecoverEvictedSWA` (sgl-project#43721) Co-authored-by: Hanming Lu <69857889+hanming-lu@users.noreply.github.com> Co-authored-by: Jialin <Jialin@users.noreply.github.com> * [Rust] Lock hyper 1.12.0 and want 0.3.2 in the rust workspace (sgl-project#43724) Co-authored-by: hanminglu <hanminglu@users.noreply.github.com> Co-authored-by: shodoco <shodoco@users.noreply.github.com> * [MemCache] Add shared component size and path APIs to the tree core interface (sgl-project#43722) Co-authored-by: Hanming Lu <69857889+hanming-lu@users.noreply.github.com> Co-authored-by: Jialin <Jialin@users.noreply.github.com> * [CI] Fix TestQwenImageModulationCache after Qwen-Image modulation sharding (sgl-project#43747) Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com> * [Bugfix] Preserve available host memory for integrated MUSA devices (sgl-project#43398) Signed-off-by: Xucheng Zhou <aden1350@outlook.com> * [Tokenizer] Require fastokens>=0.3.2 and include it in the all extra (sgl-project#43104) * [AMD][V4.1][*/N] Fix DP attention + TP MoE decode NaN and support bounded replay (sgl-project#43077) Co-authored-by: wunhuang <wunhuang@amd.com> Co-authored-by: HAI <hixiao@gmail.com> * Support kv cache sharding for DSA indexer (sgl-project#40925) * [AMD][MORI] Add MORI EP V2 support (sgl-project#40666) * [PD] Retract transferred decode requests on a retract pause (sgl-project#43757) * [DSV4.1] Reduce eager Engram extend preparation (sgl-project#42159) Co-authored-by: Shangming Cai <csmthu@gmail.com> Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com> * [Test] Re-anchor the VLM flashinfer throughput floor (sgl-project#43762) Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai> * [Fix] scheduler: stop latching batch_is_full when nothing can run (sgl-project#41872) Co-authored-by: hnyls2002 <lsyincs@gmail.com> Co-authored-by: Liangsheng Yin <hnyls2002@gmail.com> * [RL] Return a failed weight update when the cache flush is refused (sgl-project#43758) * [CI] Skip eval retries in the PD transfer-failure test (sgl-project#43769) * docs: sync LMSYS SGLang blog cards (sgl-project#43462) Co-authored-by: sglang-bot <sglang-bot@users.noreply.github.com> * [Deps] Bump FlashInfer to 0.7.1 (sgl-project#43494) Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai> * [XPU CI] Optimize PR CI per-file timeouts and fail hanging tests fast (sgl-project#42048) * [Fix] Adapt to transformers 5.18 / 5.19 changes (sgl-project#43688) Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai> * [diffusion][xpu] FLUX.2: enable the bit-exact Triton SwiGLU on XPU (sgl-project#41940) Co-authored-by: Claude Opus 5 <noreply@anthropic.com> Co-authored-by: Mick Qian <mickqian@users.noreply.github.com> * docs: clarify prefill CP terminology and simplify wording (sgl-project#43787) * [Fix] Link cuda_ipc JIT against CUDA driver stubs dir (sgl-project#43764) * [Perf] Route BF16 mixed-batch decode tails through decode attention (sgl-project#43238) Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com> Co-authored-by: Xiaoyu Zhang <1182563586@qq.com> * [PD] Poison the deferred abort ack when a Mooncake send fails (sgl-project#43719) Co-authored-by: Claude Fable 5.1 <noreply@anthropic.com> * [HiCache] Support Mamba in buffer-only host memory mode (sgl-project#36345) * [HiCache] Preserve all MTP KV and recurrent state (sgl-project#40223) Co-authored-by: alphabetc1 <2508695655@qq.com> Co-authored-by: Shuwen Wang <47200617+alphabetc1@users.noreply.github.com> * [CI] Move tests that do not need GB300 off the per-PR GB300 suite (sgl-project#43784) Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai> * Capture KV host transfer buffers (sgl-project#43711) * Keep NIXL Mamba checkpoint keys separate by TP rank (sgl-project#43594) * [XPU] Support decode context parallelism (DCP) on Intel XPU (sgl-project#34355) Co-authored-by: Siju Samuel <siju.samuel@intel.com> * [BCG][DSV4-Flash][CP] Support DeepSeek V4 prefill with interleave CP and breakable CUDA graphs (sgl-project#38603) * [DSV4.1][PD][1/N] Support prefill node use cp parallel strategy (sgl-project#40323) * [Docs] Update GLM-5.3-Flash playground: B300 default, CP8, EP and PD (sgl-project#43802) * [Docs] Cookbook: refresh SemiAnalysis AgentX launches (GLM-5.2 B300, DeepSeek-V4.1 GB300) (sgl-project#43799) Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com> * [NPU] Stabilize HiCache and registered CI tests (sgl-project#43308) * [sgl-router] Serve the Anthropic Messages API on /v1/messages (sgl-project#42316) Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com> Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com> * [Fix] Make tokenizer request-state initialization atomic (sgl-project#41911) Co-authored-by: Cheng Wan <54331508+ch-wan@users.noreply.github.com> * [XPU] Upgrade XPU backend to PyTorch 2.14 (sgl-project#42003) Co-authored-by: Ashwini Rathi <arathi@habana.ai> Co-authored-by: Y <ashwini.rathi@intel.com> Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com> * [PD][Spec] Give a PD decode's first EAGLE draft step a proposal distribution (sgl-project#41783) Co-authored-by: Shangming Cai <csmthu@gmail.com> * [Fix] Adapt NPU Qwen-VL processor patch to transformers 5.19 resize() signature change (sgl-project#43309) * [NPU] Diffusion CI fixes (sgl-project#43210) * [diffusion] chore: bind worker CPUs to the GPU's NUMA node when memory policy is not permitted (sgl-project#43756) Co-authored-by: Mick Qian <mickqian@users.noreply.github.com> Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com> * [CI][Diffusion] Add caching for npu GT images in CI (sgl-project#37426) Co-authored-by: Артем Савкин <58187114+OrangeRedeng@users.noreply.github.com> * [QSA] Bound the decode indexer's work by the context length (sgl-project#43463) Co-authored-by: luoyuan.luo <luoyuan.luo@antgroup.com> * Prebuild fixup_zero_kv JIT module at TRTLLM-MLA backend init (sgl-project#37525) Co-authored-by: Claude Fable 5 <noreply@anthropic.com> * [Unified Cache] Abort requests whose external linker load fails instead of crashing the scheduler (sgl-project#40896) * [DSpark] Share draft params, logits dtype, confidence and the accept tail between graph and eager (sgl-project#43790) * [DFlash] Decide the Domino candidate pool in one place and apply simulated acceptance inside the accept (sgl-project#43791) * Fix autograd retention in CUDA graph capture tail hooks (sgl-project#43854) * [ROCm] Eliminate HiCache migration stalls and use exact-size host allocations (sgl-project#42553) Signed-off-by: JohnQinAMD <yanyuan.qin@amd.com> Co-authored-by: JohnQinAMD <yanyuan.qin@amd.com> * [AMD] Keep the FP4 varctx schedule test off AITER's 2048-row compile (sgl-project#41793) * [AMD] Add flydsl mxfp8 dense gemm kernel for dpsk v4.1 prefill (sgl-project#43803) * [AMD] Fix test_compact_attention_hip.py CI (sgl-project#43836) * [AMD] [Docker] Update MoRI to v1.2.4 (sgl-project#43834) * [Kernel] Expose bundled FlashMLA MegaAttention kernels and APIs (sgl-project#43918) * [DeepSeek-V4.1] Admit the NIXL transfer backend for DSpark PD (sgl-project#43734) * [AMD] Recalibrate test_quark_mxfp4 GSM8K thresholds to observed MI355X noise (sgl-project#41980) * [DSV4][CP] Write low-ratio page indices when CP prefill runs paged attention (sgl-project#43935) * [Build][CI] Drop Python 3.10: require Python 3.11+ and run CUDA CI on Python 3.12 (sgl-project#43021) Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai> Co-authored-by: Mohammad Miadh Angkad <176301910+mmangkad@users.noreply.github.com> * [DeepSeek-V4.1] mHC: drop seam_open, narrow precomputed stats in take_rows (sgl-project#43833) Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com> * [DSv4.1] Reduce sparse-prefill workspace padding (sgl-project#43921) * [HiCache] Avoid full-store scans for uncached file prefix lookups (sgl-project#42077) Signed-off-by: apex-mochen <2756823972@qq.com> Co-authored-by: apex-mochen <265981728+apex-mochen@users.noreply.github.com> Co-authored-by: Zhiqiang Xie <xiezhq@stanford.edu> * [Fix] Preserve HTTP errors for non-streaming /v1/messages (sgl-project#43796) Co-authored-by: Xinyuan Tong <xinyuantong.cs@gmail.com> Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com> * [DSv4.1] Temporarily disable B300 PD/CP accuracy test (sgl-project#43948) * [PD] Recompute retracted DeepSeek-V4 requests on prefill instead of crashing decode (sgl-project#43936) * [Fix] Account for captured inputs in DeepGEMM masked workspace budget (sgl-project#43563) * [AMD] Update v4 amd cookbook 1012 (sgl-project#43962) * [CI] Remove Mistral Small 4 e2e test (sgl-project#43973) Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai> * Reuse Hugging Face LFM2-MoE configuration (sgl-project#43939) Co-authored-by: Codex <codex@openai.com> * fix(openai): honor tool_choice=none in DeepSeek encoders (sgl-project#43006) Co-authored-by: ai-jz <ai-jz@users.noreply.github.com> Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com> * [diffusion] comfyui: run MiniMax H3, FastH3 and VDN in SGLD integrated mode (sgl-project#43504) * [diffusion] fix: keep MiniMax-H3 VAE fused norms off ROCm (sgl-project#43350) * [diffusion] fix: avoid redundant LoRA scaling while preserving exact numerics (sgl-project#43028) Co-authored-by: Mick Qian <mickqian@users.noreply.github.com> * tokenizer perf optimization (sgl-project#39771) Co-authored-by: BBuf <1182563586@qq.com> Co-authored-by: Xinyuan Tong <xinyuantong.cs@gmail.com> * [diffusion] perf: implement paint_use_remesh (decimate to 40k faces before UV unwrap) for Hunyuan3D (sgl-project#42770) Co-authored-by: Mick Qian <mickqian@users.noreply.github.com> * [AMD][Kimi-K3] Use public FlyDSL APIs in KDA decode kernels (sgl-project#43968) Co-authored-by: wunhuang <wunhuang@amd.com> * [AMD] Fix Flux2 kv-gather abort on non-contiguous K/V (sgl-project#43793) Co-authored-by: Mick Qian <mickqian@users.noreply.github.com> * [AMD] Fuse prefill index-Q RoPE fake-quant and fp4 quantize kernels in DSV4.1 (sgl-project#42911) * [AMD][DI][CI] dsv4pro-fp8 2p1d-ep16-mtp: raise prefill mem fraction for MORI EP v2 memory (sgl-project#43944) * [router] Fix power_of_two with --dp-aware (sgl-project#42027) * [ROCm][Spec] Route NGRAM tree reconstruction to the JIT kernel on HIP (sgl-project#43328) Co-authored-by: Cursor <cursoragent@cursor.com> Co-authored-by: Thomas Wang <thomawan@amd.com> * [PD] Support heterogeneous TP for hybrid SWA KV transfer (sgl-project#40909) * [Diffusion] Speed up LTX-2 guidance and video output (sgl-project#43667) * [AMD][PD] enable mori transfer for PD decode DCP (sgl-project#37358) Signed-off-by: inkcherry <mingzhi.liu@amd.com> Co-authored-by: Duyi-Wang <duyi.wang@amd.com> Co-authored-by: HAI <hixiao@gmail.com> Co-authored-by: Shangming Cai <csmthu@gmail.com> * [Docs] Cookbook: refresh SemiAnalysis AgentX launches (DeepSeek-V4.1 GB200/GB300, GLM-5.2 FP8 B300) (sgl-project#43983) Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com> * [PD][NIXL] Fix staging buffer startup by accepting slot_layer_ids (sgl-project#43723) Co-authored-by: Po-Han Huang (NVIDIA) <53919306+nvpohanh@users.noreply.github.com> * [router] power_of_two: in-flight request load for --dp-aware decode (sgl-project#43483) * [Perf] Enable fast-math for JIT activations on Blackwell (sgl-project#43236) Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com> * [NVIDIA][MegaMoE] Fix the default spec decoding moe backend when the target model uses flashinfer megamoe (sgl-project#40772) Co-authored-by: Po-Han Huang (NVIDIA) <53919306+nvpohanh@users.noreply.github.com> * [HiCache][PD] Allow DSA index-K elision under HiCache and disaggregation (sgl-project#41769) Co-authored-by: Anish Shanbhag <ashanbhag@nvidia.com> * [CI] Use sgl-eval for GLM-5.3-Flash GSM8K tests (sgl-project#43975) Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai> * [FlashInfer] Add startup autotuning for MegaMoE (sgl-project#43789) * [Perf] Compact GDN causal-conv grids for skewed prefill batches (sgl-project#43570) * [AMD][CI] Run test_tracing.py in the extra tier, matching CUDA (sgl-project#43928) Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com> * Fix EVS for NemotronH_Omni_Reasoning_V3 (sgl-project#42933) Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com> Co-authored-by: Po-Han Huang (NVIDIA) <53919306+nvpohanh@users.noreply.github.com> * fix(multimodal): convert grayscale tensors to RGB in PIL backend (sgl-project#42127) Co-authored-by: 周云昊 <zhouyunhao@zhouyunhaodeMacBook-Pro.local> * [diffusion] comfyui: run Qwen-Image 2.1 in SGLD integrated mode (sgl-project#43581) * [diffusion] feat: add configurable reference image resizing for MiniMax H3 Ref2VA (sgl-project#35839) Co-authored-by: Mick Qian <mickqian@users.noreply.github.com> * Fix/compressed tensors nvfp4 hopper (sgl-project#40022) Co-authored-by: Claude Opus 5 <noreply@anthropic.com> * [NPU] [DOC] update kimi k3 cookbook and supported features on NPU (sgl-project#44052) * [DSA] Q8KV8 FP8 Sparse Prefill on GLM-5.3-Flash with BF16 KV Cache (sgl-project#41790) Co-authored-by: Xiaoyu Zhang <1182563586@qq.com> * [CI] Run test_pi05_modelopt_fp8_cuda in the kernel-unit lane (sgl-project#44055) Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com> * fix(openai): omit absent tool_calls from chat responses (sgl-project#43027) Co-authored-by: ai-jz <ai-jz@users.noreply.github.com> Co-authored-by: Xinyuan Tong <xinyuantong.cs@gmail.com> * Skip fully-masked KV tiles in sliding-window extend attention (sgl-project#39769) Co-authored-by: Cursor <cursoragent@cursor.com> * fix(openai): keep chat stream created timestamp stable (sgl-project#43026) Co-authored-by: ai-jz <ai-jz@users.noreply.github.com> Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com> * fix(openai): preserve zero cached tokens when cache reporting is enabled (sgl-project#43005) Co-authored-by: ai-jz <ai-jz@users.noreply.github.com> Co-authored-by: Xinyuan Tong <115166877+JustinTong0323@users.noreply.github.com> * [AMD][DI][CI] glm52 2p1d-ep16: capture CUDA graph on decode (eager decode is too slow) (sgl-project#43977) * [AMD][DI][CI] kimik26 2p1d-ep16: capture CUDA graph on decode (eager decode is slow) (sgl-project#43985) * [perf] [multi-lora] remove empty CTAs from fused LoRA expand and add split-K to shrink (sgl-project#41951) Co-authored-by: Yanbin Jiang <jybsuper@gmail.com> * Rainj me/rust bench (sgl-project#43950) * [Observability] Report per-request storage prefetch and staging waits in meta_info (sgl-project#43946) Co-authored-by: Hanming Lu <69857889+hanming-lu@users.noreply.github.com> Co-authored-by: xiezhq-hermann <xiezhq-hermann@users.noreply.github.com> * [lora] Support LoRA for the NemotronH_Nano_VL_V2 model family (sgl-project#39798) Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com> Co-authored-by: Po-Han Huang <pohanh@nvidia.com> Co-authored-by: Yanbin Jiang <jybsuper@gmail.com> * [Rust] Refuse an unsupported multimodal model before the Rust listener binds (sgl-project#43925) Co-authored-by: Hanming Lu <69857889+hanming-lu@users.noreply.github.com> Co-authored-by: shodoco <shodoco@users.noreply.github.com> * [Core] Keep request priority within the signed 64-bit range in radix caches (sgl-project#43920) Co-authored-by: Hanming Lu <69857889+hanming-lu@users.noreply.github.com> Co-authored-by: qandrew <qandrew@users.noreply.github.com> * [DCP] Decode context parallelism for DSA (GLM-5.2 / GLM-5.3) with MTP (sgl-project#43735) Co-authored-by: vincentzed <207368749+vincentzed@users.noreply.github.com> * [HiCache] Block-group pool hits, caller-owned load destinations, allocation-target FULL eviction (sgl-project#43868) Co-authored-by: Hanming Lu <69857889+hanming-lu@users.noreply.github.com> Co-authored-by: xiezhq-hermann <xiezhq-hermann@users.noreply.github.com> * [Rust] Let an embedding package wrap the frontend HTTP app (sgl-project#43924) Co-authored-by: hanminglu <hanminglu@users.noreply.github.com> Co-authored-by: shodoco <shodoco@users.noreply.github.com> * [Core] Add request-level customized_info keys and mark Full prefill capture batches (sgl-project#43772) Co-authored-by: Hanming Lu <69857889+hanming-lu@users.noreply.github.com> Co-authored-by: jiayisuse <jiayisuse@users.noreply.github.com> * [HiCache] Extract the buffer-mode prefetch and load-back lifecycle into pipeline operations (sgl-project#43870) Co-authored-by: Hanming Lu <69857889+hanming-lu@users.noreply.github.com> Co-authored-by: xiezhq-hermann <xiezhq-hermann@users.noreply.github.com> * [unified memory pool] Prefer SWA reclaim quotas with a HiCache storage backend or on PD decode (sgl-project#43919) Co-authored-by: Hanming Lu <69857889+hanming-lu@users.noreply.github.com> Co-authored-by: ZYHowell <ZYHowell@users.noreply.github.com> * [Rust] Serve any `model` name on the OpenAI chat and completions routes (sgl-project#43923) Co-authored-by: Hanming Lu <69857889+hanming-lu@users.noreply.github.com> Co-authored-by: shodoco <shodoco@users.noreply.github.com> * docs: add MiniCPM-V 4.7 cookbook (sgl-project#43829) * [Feature] Add Aaronson-Gumbel text watermarking (sgl-project#37577) Co-authored-by: Nihar Patel <nihpat95@gmail.com> * [HiSparse] Add speculative decoding support with multi-step KV cache swapping (sgl-project#37771) * [gRPC] Move runtime.v1 bindings to tonic 0.14, report OpenAI status codes, return text on request (sgl-project#42673) Co-authored-by: Kan Wu <kan.wu@radixark.ai> Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com> * [DeepSeek-V4.1] Run decoder SWA bounded replay inside the breakable prefill CUDA graph (sgl-project#43736) * fix(benchmark): request token IDs when counting OpenAI prompts (sgl-project#34511) Co-authored-by: Zijie Xia <zijie.xia@radixark.ai> * Mark FP32 redux asm volatile (sgl-project#44137) * [Score] Send stacked GPU embedding overrides through a CUDA IPC pool (sgl-project#39730) Co-authored-by: Sundara Raman Ramachandran <sundar24295@gmail.com> Co-authored-by: hnyls2002 <lsyincs@gmail.com> * [Feature] Return output top logprobs as flat base64 arrays on request (sgl-project#42890) Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com> * [DSV4.1] Support decoder SWA bounded replay with CUDA DP attention (sgl-project#43812) * GLM5.2 DSA Indexer Fallback (sgl-project#32947) Co-authored-by: Shu Wang <shuw@login-hecate03.hecate.clusters.nvidia.com> Co-authored-by: Po-Han Huang (NVIDIA) <53919306+nvpohanh@users.noreply.github.com> * [Fix] Work around a CPython fork deadlock in the CPU preprocess pool (sgl-project#44143) * [DSV4.1] Skip Mega mHC fusion on 0-row (DP-idle) batches (sgl-project#43993) Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com> * [Chore] release: Cherry-pick [Disagg] Return prompt routed experts from the PD prefill server to release/v0.5.22 (sgl-project#44002) (sgl-project#44212) Co-authored-by: William Arnold <7565007+Aphoh@users.noreply.github.com> Co-authored-by: Devin <158243242+devin-ai-integration[bot]@users.noreply.github.com> Co-authored-by: ishandhanani <82981111+ishandhanani@users.noreply.github.com> * [Chore] release: Cherry-pick [CI] glm5.2: Temporarily disable PD HiSparse+MTP B300 test to release/v0.5.22 (sgl-project#44192) (sgl-project#44214) Co-authored-by: Mohammad Miadh Angkad <176301910+mmangkad@users.noreply.github.com> Co-authored-by: Mohammad Angkad <mohammad.angkad@radixark.ai> * [XPU] Fix FP8 KV cache support for ModelOpt quantized models (e.g. Llama-3.3-70B-FP8) * [XPU] Add MXFP4 W4A16 MoE inference support for Intel Xe2 (GPT-OSS) Enable MXFP4 quantized inference on XPU using the native Xe2 SYCL fused_experts kernel (sgl-kernel-xpu PR#184). - quantization/__init__.py: register mxfp4 quantization method for XPU - quantization/fp4_utils.py: broaden flashinfer import exception to avoid crash on XPU where flashinfer is unavailable - quantization/mxfp4.py: - align intermediate size to 64 for XPU (create_weights) - skip CPU dequant on XPU; leave weights as packed uint8 in VRAM (process_weights_after_loading) - add XPU dispatch in apply(): call sgl_kernel.fused_experts with use_mxfp4_w4a16=True; convert UE8M0 uint8 scales to float32 via exp2(uint8 - 127); default gemm1_alpha=1.702 / gemm1_limit=7.0 to select activation_type=2 (ACT_SWIGLU_GPT_OSS, interleaved weight layout required by GPT-OSS MXFP4 checkpoints) - models/gpt_oss.py: replace hardcoded .cuda() with .to(get_device()) in weight loading to support XPU * [XPU] Improvement for fp4 and fp8 Optimize FP8 KV cache: lazy mirror buffer to avoid full cast per step Fix MXFP4 MoE: read activation/gemm1 params from model config instead of GPT-OSS hardcoded values * Remove WA for FP8 KV cache * Add analyze support for XPU * [Intel][XPU] Allow mamba extra_buffer radix cache strategy on XPU (#9) Co-authored-by: root <root@gnrsp-bmg3.iind.intel.com> --------- Signed-off-by: siliangchen-amd <SiLiang.Chen@amd.com Signed-off-by: Sage Ahrac <sagiahrak@gmail.com> Signed-off-by: Phoenix3334 <Phoenix3334@users.noreply.github.com> Signed-off-by: Banruo Liu <lichangxinlivingshade@gmail.com> Signed-off-by: Xucheng Zhou <aden1350@outlook.com> Signed-off-by: JohnQinAMD <yanyuan.qin@amd.com> Signed-off-by: apex-mochen <2756823972@qq.com> Signed-off-by: inkcherry <mingzhi.liu@amd.com> Co-authored-by: Mick <mickjagger19@icloud.com> Co-authored-by: Mick Qian <mickqian@users.noreply.github.com> Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com> Co-authored-by: Raymond Huang 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Motivation
On pre-Blackwell GPUs (SM < 100), every compressed-tensors NVFP4 checkpoint fails
at quant-scheme construction on the first attention linear -- it never reaches
weight loading:
nvfp4(w4a4)tensor_groupNotImplementedError: Current platform does not support w4a4 nvfp4 quantization.nvfp4a16tensor_groupImportErroraboutW4A16Sparse24Two independent root causes:
_is_wNa16_group_channelnever checkstype == INT, so a weight-only4-bit float config satisfies it. It runs first, outside the
is_activation_quantization_formatgate, and short-circuits withraise ImportErrorfor any non-pack_quantizedformat -- which is whynvfp4a16reports a misleading sparse-24 import error. vLLM has the identical missing
check but escapes it by predicate ordering.
scheme,
CompressedTensorsW4A4Fp4, reportsget_min_capability() == 100andcalls
fp4_gemmunconditionally.The dense FP4 Marlin kernel already implements exactly what NVFP4 needs --
group_blocks == 1(gs=16) and E4M3 group scales -- and NVFP4 always carries areal global scale. So NVFP4 can be served weight-only (fp4 weights, bf16/fp16
activations) on SM80+ with no kernel changes.
Modifications
compressed_tensors.py_is_wNa16_group_channelnow requirestype == INT. This is narrower thanreordering the predicates: int4
pack-quantizedis INT by definition so itcannot regress, and it closes the trap for the next float4 variant instead of
stepping around it.
_is_fp4a16_nvfp4predicate dispatchingnvfp4a16to the weight-onlyscheme.
NotImplementedErrorbecomes a graceful downgrade to theweight-only scheme with a
warning_once, following the existing precedent twobranches below where
_is_fp8_w8a8falls back toCompressedTensorsW8A16Fp8.downgrading.
CompressedTensorsW4A16Fp4sibling scheme withget_min_capability() -> 80, rather than vLLM's single-classuse_a16flag.get_min_capabilityis a@classmethodresolved on the instance's class, so oneshared class returning
<= 90would silently lower the Blackwell gate for thereal w4a4 path too.
has_input_global_scaledistinguishes a downgraded w4a4checkpoint (which carries
input_global_scaleon disk, dropped post-load) from anative a16 one.
compressed_tensors_w4a4_nvfp4.pygains the Marlin branch inprocess_weights_after_loading/apply_weights. Three attribute fixes areprerequisites, since the prep helper reads what CT does not set:
params_dtype(a missing value trips a raise),
quant_config(the group_size guard isif getattr(...) is not None, so a missing attr means no validation at all),and rebinding
weight_packed -> weight.Note the global-scale inversion: compressed-tensors stores NVFP4 global scales as
divisors (
1/scale) while Marlin wants the scale. Missing the inversion overflowsthe bf16 dequant bias multiply to
inf, zeroing all logits and emitting token 0forever -- which is why the end-to-end checks below assert on coherent text, not
just a clean load.
No change to Blackwell behavior. MXFP4 is deliberately out of scope: the dense
kernel has no
group_blocks == 2instantiation, its template cannot decode E8M0scales, and it requires a non-empty
global_scalethat MXFP4 lacks. MXFP4 nowfails with an honest "no compatible scheme" instead of the sparse-24
ImportError.Accuracy Tests
End-to-end on H100 (SM90), offline
Engine, greedy, prompt"The capital of France is".downgradeis whether the weight-only substitutionwarning fired -- it must fire for a w4a4 checkpoint and stay silent for a16:
" Paris.\" We need to output the same sentence..."" Paris.\" We need to output the same sentence. So answer:..."" Paris. The capital of France is Paris..."" Paris. The capital of France is Paris..."". Question1: What is the capital of France? Answer1"". The capital of France is Paris. The capital of..."The warning fires for every w4a4 checkpoint and stays silent for every a16
checkpoint at every TP size. No regression on the bf16 base, both fp8 variants,
or
w4a16-c4(the int4 path most exposed to thetype == INTchange).Also verified on real SM90 with no capability mock:
nvfp4(w4a4) -> CompressedTensorsW4A16Fp4 has_input_global_scale=True,nvfp4a16 -> CompressedTensorsW4A16Fp4 has_input_global_scale=False.Speed Tests and Profiling
Not a performance change -- this makes previously-unloadable checkpoints load.
Weight-only FP4 Marlin is the same kernel path
ModelOptNvfp4A16LinearMethodalready uses on these GPUs.
Checklist
Tests added:
test/registered/unit/layers/quantization/test_compressed_tensors_fp4_linear_scheme.py-- 11 CPU scheme-selection tests (register_cpu_ci,override_platform(is_sm90=True)): SM90 downgrade for both variants, SM100 still selecting nativeCompressedTensorsW4A4Fp4(guarding the Blackwell gate), int4pack-quantizedstill selectingCompressedTensorsWNA16(guarding thetype == INTfix), non-NVFP4 input quant raising, and the downgrade warning firing for w4a4 but not a16.test/registered/kernel/quantization/test_compressed_tensors_fp4_linear_numeric.py-- GPU numeric test for the weight-only NVFP4 dense Marlin path (rtol=atol=0.04), modeled on the existingtest_nvfp4_marlin.py.test/registered/kernels/ops/quantization/test_nvfp4_marlin.pypasses unchanged (4 passed).🤖 Generated with Claude Code
CI States
Latest PR Test (Base): ❌ Run #38024523677
Latest PR Test (Extra): ❌ Run #38024523541
Latest PR Test (AMD ROCm 10): ❌ Run #38024523503