[diffusion][xpu] FLUX.2: enable the bit-exact Triton SwiGLU on XPU

[AgainstEntropy]

Motivation

FLUX.2's packed SwiGLU fast path (fused_packed_silu_mul_bitexact) is a Triton
kernel, so there is no reason it cannot run on Intel XPU. Both the kernel's own
guard and the FLUX.2 call site required x.is_cuda, and the kernel entered
torch.cuda.device, so XPU always fell back to the two-kernel eager chain
(F.silu(x[..., :half]) * x[..., half:]).

Modifications

• kernels/ops/diffusion/activation/silu_mul_bitexact.py: accept XPU tensors in
  fused_packed_silu_mul_bitexact, and enter the device through
  torch.get_device_module(x.device).device(...) instead of torch.cuda.device.
• multimodal_gen/runtime/models/dits/flux_2.py (_flux2_swiglu): accept XPU in
  the can_fuse predicate, and use the device-generic
  torch.get_device_module(x.device).is_current_stream_capturing() for the
  graph-capture check.

No CUDA behaviour changes: the predicate gains an or x.is_xpu, and both
torch.get_device_module calls resolve to torch.cuda on a CUDA tensor.

Accuracy Tests

The existing BitExactFusionGate already verifies this path: on the first call
per signature the kernel output is compared with torch.equal against the live
eager chain, and the fast path is disabled permanently on mismatch. On Arc Pro
B70 (torch 2.13.0+xpu) it verifies and stays enabled — no
"not bit-exact ... falling back to eager" warning in any end-to-end run.

Existing CUDA coverage (test_activation.py::test_packed_silu_mul_is_bit_exact,
test_model_fast_paths.py::TestFlux2EagerFusions) is unchanged and still applies.

Speed Tests and Profiling

FLUX.2-dev, 1024x1024, 8 denoise steps, guidance 4.0, seed 42, bf16, eager (no
torch.compile), warm request, TP4 on 4x Arc Pro B70:

	denoise (8 steps)
before	6.64 s
after	6.569 / 6.572 s

About 1%. The fused kernel replaces two eager elementwise passes over a
per-rank [4608, 4608] bf16 buffer; at this size it is a small win, and 1% is
close to run-to-run noise on this machine — the main value is that the
already-existing fast path stops being silently skipped on XPU.

Checklist

• Format your code according to the Format code with pre-commit.
• Add unit tests according to the Run and add unit tests.
• Update documentation according to Write documentations.
• Provide accuracy and speed benchmark results according to Test the accuracy and Benchmark the speed.
• Follow the SGLang code style guidance.

Review and Merge Process

1. Ping Merge Oncalls to start the process. See the PR Merge Process.
2. Get approvals from CODEOWNERS and other reviewers.
3. Trigger CI tests with comments or contact authorized users to do so.
   • Common commands include /tag-and-rerun-ci, /tag-run-ci-label, /rerun-failed-ci
4. After green CI and required approvals, ask Merge Oncalls or people with Write permission to merge the PR.

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CI States

Latest PR Test (Base): 🚫 Run #37272593101
Latest PR Test (Extra): ❌ Run #37272592827
Latest PR Test (AMD ROCm 10): ❌ Run #37272592993

[mickqian]

/tag-and-rerun-ci