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Support Confidential Computing (CC) for Qwen3.5-397B-A17B-FP8 on B300 - #28251

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Support Confidential Computing (CC) for Qwen3.5-397B-A17B-FP8 on B300#28251
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@elvischenv elvischenv commented Jun 15, 2026

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Superseded by #31447.


Targets release/v0.5.12. Enables Confidential Computing (CC) inference on B300 (validated with Qwen3.5-397B-A17B-FP8, TP4).

CC perf fixes — auto-enabled when NVIDIA CC is detected (is_confidential_compute()), byte-identical off-CC:

  • Async D2H copy worker — run the per-step D→H token readback on a dedicated daemon thread, so the forced-synchronous copy under bounce-buffer CC no longer blocks the scheduler and serializes overlap.
  • Ungate the FlashInfer AllReduce+RMSNorm fusion under CC — build it on a multicast-free IPC workspace instead of disabling it (kernel parity with cc_off).

Also included: port of #23351 (piecewise CUDA graph with NSA) for DSA/NSA models.

See CC_FIXES.md for details.


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@github-actions github-actions Bot added documentation Improvements or additions to documentation quant LLM Quantization amd lora Multi-modal multi-modal language model deepseek speculative-decoding hicache Hierarchical Caching for SGLang blackwell SM100/SM120 npu piecewise-cuda-graph diffusion SGLang Diffusion jit-kernel labels Jun 15, 2026
sheelpethe and others added 4 commits June 15, 2026 07:06
Under Confidential Computing the per-step Device->Host result readback in
GenerationBatchResult.copy_to_cpu becomes a synchronous cudaMemcpyAsync that
blocks the scheduler thread ~one decode step at issue (host dest is
Managed/UVM-backed), so the scheduler can't launch the next CUDA graph and
overlap is serialized (~40-87% loss at high concurrency).

The copy can't be made async under CC; instead run the still-blocking copy on
a dedicated daemon thread (TRT-LLM sgl-project#8463 pattern) so it's non-blocking to the
scheduler thread, restoring overlap.

- utils/common.py: cached is_confidential_compute() via NVML
  nvmlSystemGetConfComputeState, fail-safe.
- managers/overlap_copy_worker.py: AsyncD2HCopyWorker (daemon thread + queue),
  with explicit teardown.
- managers/scheduler.py: gate enable_cc_async_copy = is_confidential_compute();
  submit to the worker (CC) or run inline (non-CC) at the 3 issue sites; logs
  once at INFO when active.
- managers/scheduler_output_processor_mixin.py: wait on copy_ready_cpu under CC
  at the consume sites.

Auto-enabled when CC is detected; off-CC behavior is byte-identical. Ref
sgl-project#26469.

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
cc_off uses FlashInfer's trtllm AR+RMSNorm fusion, but under CC it disables
itself: create_allreduce_fusion_workspace hardcodes use_symm_dev_mem=True
(multicast), and its cuMulticast preflight fails under CC. The kernel itself
is multicast-free (one-shot Lamport; 0 multimem in trtllm_allreduce_fusion.cuh)
-- only the workspace allocator wanted multicast.

Build the fusion on a multicast-free IPC workspace instead
(trtllm_create_ipc_workspace_for_all_reduce_fusion(use_symm_dev_mem=False)),
skipping the cuMulticast preflight, and drive trtllm_allreduce_fusion with
use_oneshot + kARResidualRMSNorm. Restores kernel parity with cc_off.

Enabled by default whenever CC is detected (is_confidential_compute()) -- no
env var needed; off-CC behavior is unchanged. Logs once at INFO when the
multicast-free workspace initializes.

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Repo-base summary of the async D2H copy worker and the ungated FlashInfer
AR+RMSNorm fusion: problem, change, INFO marker, and CC-auto-enable. Pairs
with the flashinfer cc-autotuner-fixed branch.

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Port of sgl-project#23351 ("Support piecewise CUDA graph with NSA"),
translated across this fork's dsa->nsa rename (sgl-project#25014).

- nsa_indexer: add k_cache_and_topk_result / logits_head_gate_pcg custom ops;
  PCG guards in forward_cuda (metadata fetch, delayed K-cache store, gate,
  seq_lens_cpu access); optional topk_result in _get_topk_ragged; out_cache_loc
  param in _store_index_k_cache; CP/loop-path asserts; is_compiling rope guard.
- nsa_backend: force use_mha=False under PCG; drop _forward_trtllm squeeze(1).
- piecewise_context_manager / model_runner / piecewise_cuda_graph_runner:
  thread nsa_indexers through the forward context.
- model_config: un-gate NSA models from the piecewise disable list.
- hadamard / layernorm: wrap in register_custom_op with fake impls.
- radix_attention: pass cos_sin_cache/is_neox/llama_4_scaling/topk_indices
  through the split-op schema.
- deepseek_v2: skip moe_output_buffer_ctx while compiling.
- server_args: disable PCG under NSA prefill-CP; remove flashinfer-MoE
  PCG-disable block.
- test: add test_pcg_glm5_fp4.py (GLM-5-NVFP4, TP=4, B200).

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
@elvischenv elvischenv changed the title Confidential Computing (CC) inference-perf fixes Support Confidential Computing (CC) for Qwen3.5-397B-A17B-FP8 on B300 Jun 15, 2026
@nvpohanh

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@elvischenv The description looks outdated. could you update it?

@elvischenv

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Superseded by #31447. Closing.

@elvischenv elvischenv closed this Aug 13, 2026
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elvischenv deleted the cc-fixes branch August 13, 2026 16:40
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amd blackwell SM100/SM120 deepseek diffusion SGLang Diffusion documentation Improvements or additions to documentation hicache Hierarchical Caching for SGLang jit-kernel lora Multi-modal multi-modal language model npu piecewise-cuda-graph quant LLM Quantization speculative-decoding

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