Support piecewise CUDA graph with NSA - #23351
Conversation
There was a problem hiding this comment.
Code Review
This pull request enables piecewise CUDA graph support for Native Sparse Attention (NSA) models by registering custom operators for Hadamard transforms, LayerNorm, and NSA indexing. It updates the context management and graph runners to handle NSA indexers and adjusts tensor slicing to accommodate padding in CUDA graphs. Feedback focused on correcting the output tensor dimensions in the TRT-LLM MLA decode path and adding necessary metadata checks and tensor slicing in the NSA indexer custom operations to prevent runtime errors.
| metadata = forward_batch.attn_backend.get_indexer_metadata( | ||
| layer_id, forward_batch | ||
| ) |
There was a problem hiding this comment.
In piecewise CUDA graph mode, metadata can be None if the attention backend decides to skip the batch (e.g., if there are no tokens to process). We should check for None to avoid potential crashes in subsequent calls like _get_topk_ragged.
| metadata = forward_batch.attn_backend.get_indexer_metadata( | |
| layer_id, forward_batch | |
| ) | |
| metadata = forward_batch.attn_backend.get_indexer_metadata( | |
| layer_id, forward_batch | |
| ) | |
| if metadata is None: | |
| return |
| ), "FP8/MXFP8 Cutlass MoE is only supported with ep_size == 1" | ||
|
|
||
| # TODO(yuwei): Fix piecewise cuda graph support for bypassed topk MoE backends. | ||
| # Exception: GptOssForCausalLM wraps the entire MoE block in its own |
There was a problem hiding this comment.
Rather than removing this if block, we can add an exemption for dsa models here
There was a problem hiding this comment.
The problem here is torch.compile compatibility instead of PCG compatibility. The fix was in sglang before the removal of the block, and it seems general to all models. Do you still think we need to guard it?
There was a problem hiding this comment.
I think we still need the guard: the custom op fixes Dynamo traceability, but it does not guarantee every flashinfer_trtllm bypassed-topk kernel is safe under PCG capture/replay. I opened a PR to restore the guard and add the exemption only for DSA models / already-supported paths.
|
We can add a PCG test for GLM-5-fp4, registered as stage-c-test-4-gpu-b200 |
|
For the gpqa accuracy test, please make sure temperature is 1.0, top_p is 0.95, We also need another accuracy test for AIME2025, with the instruction here https://docs.sglang.io/docs/basic_usage/deepseek_v32#accuracy-test-with-aime-2025. |
Added gsm8k test. I understand it doesn't catch all indexer bugs, but it runs in ~10min. Let me know if you want a different test. |
https://github.com/sgl-project/sglang/actions/runs/26256885165/job/77291831227?pr=23351 |
|
Failure caused by bad merge from #25983. Fixed. |
https://github.com/sgl-project/sglang/actions/runs/26265766989/job/77308576707?pr=23351 |
|
Fixed |
|
/tag-and-rerun-ci |
|
/rerun-test test_pcg_glm5_fp4.py |
|
🚀 |
|
Other tests are OK https://github.com/sgl-project/sglang/pull/23351/checks?sha=632b381033e3ea1faf5d0561a12ff6b6f1b4fa0a |
|
/rerun-test test_pcg_glm5_fp4.py |
|
🚀 |
Port of sgl-project#23351 ("Support piecewise CUDA graph with NSA"), translated across this fork's dsa->nsa rename (sgl-project#25014). - nsa_indexer: add k_cache_and_topk_result / logits_head_gate_pcg custom ops; PCG guards in forward_cuda (metadata fetch, delayed K-cache store, gate, seq_lens_cpu access); optional topk_result in _get_topk_ragged; out_cache_loc param in _store_index_k_cache; CP/loop-path asserts; is_compiling rope guard. - nsa_backend: force use_mha=False under PCG; drop _forward_trtllm squeeze(1). - piecewise_context_manager / model_runner / piecewise_cuda_graph_runner: thread nsa_indexers through the forward context. - model_config: un-gate NSA models from the piecewise disable list. - hadamard / layernorm: wrap in register_custom_op with fake impls. - radix_attention: pass cos_sin_cache/is_neox/llama_4_scaling/topk_indices through the split-op schema. - deepseek_v2: skip moe_output_buffer_ctx while compiling. - server_args: disable PCG under NSA prefill-CP; remove flashinfer-MoE PCG-disable block. - test: add test_pcg_glm5_fp4.py (GLM-5-NVFP4, TP=4, B200). Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Motivation
GLM-5/DSV3.2 currently doesn't allow piecewise CUDA graph due to incompatibilities in NSA attention backend and NSA indexer. This commit fixes the incompatibilities on the conditions
_store_index_k_cacheand_get_topk_raggedare excluded from CUDA graph for now, will revisit whether they can be in CUDA graph in a future PR.Benchmark results

Benchmark command
Modifications
In NSA code path:
Accuracy Tests
Repeat: 8, mean: 0.862
Scores: ['0.848', '0.874', '0.874', '0.859', '0.848', '0.843', '0.869', '0.879']
Speed Tests and Profiling
Checklist
Review and Merge Process
/tag-and-rerun-ci,/tag-run-ci-label,/rerun-failed-ciCI States
Latest PR Test (Base): 🚫 Run #26311925143
Latest PR Test (Extra): 🚫 Run #26311925079