fix: don't disallow writing to memory after passing it to brillig#8276
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TomAFrench merged 3 commits intomasterfrom Apr 29, 2025
Merged
fix: don't disallow writing to memory after passing it to brillig#8276TomAFrench merged 3 commits intomasterfrom
TomAFrench merged 3 commits intomasterfrom
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michaeljklein
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Apr 29, 2025
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LGTM w/ a few notes:
- Should we note this behavior in the
BrilligInputsdocs? - Is the original example too complex for a Noir-level regression test?
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I'm not clear what behaviour you mean, the ability to pass a memory block as input?
We could construct one but I think a more focused test is better. |
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Mainly how the initialization works |
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Automated pull of nightly from the [noir](https://github.com/noir-lang/noir) programming language, a dependency of Aztec. BEGIN_COMMIT_OVERRIDE feat: add `--debug-compile-stdin` to read `main.nr` from `STDIN` for testing (noir-lang/noir#8253) feat: better error message on unicode whitespace that isn't ascii whitespace (noir-lang/noir#8295) chore: update `quicksort` from iterative `noir_sort` version (noir-lang/noir#7348) fix: use correct meta attribute names in contract custom attributes (noir-lang/noir#8273) feat: `nargo expand` to show code after macro expansions (noir-lang/noir#7613) feat: allow specifying fuzz-related dirs when invoking `nargo test` (noir-lang/noir#8293) chore: redo typo PR by ciaranightingale (noir-lang/noir#8292) chore: Extend the bug list with issues found by the AST fuzzer (noir-lang/noir#8285) fix: don't disallow writing to memory after passing it to brillig (noir-lang/noir#8276) chore: test against zkpassport rsa lib (noir-lang/noir#8278) feat: omit element size array for more array types (noir-lang/noir#8257) chore: refactor array handling in ACIRgen (noir-lang/noir#8256) chore: document cast (noir-lang/noir#8268) END_COMMIT_OVERRIDE --------- Co-authored-by: AztecBot <tech@aztecprotocol.com> Co-authored-by: Tom French <15848336+TomAFrench@users.noreply.github.com>
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Description
Problem*
Resolves
Summary*
This fixes an issue that @MirandaWood was running into on her batched blobs branch.
@kashbrti and I found the root cause is that if a memory block is passed as an argument to a brillig call then the
CircuitSimulatormarks it as "used" at which point it will reject any future writes to that memory block. I don't see any reason for why the simulator should reject this so I've replaced this logic with a simple check to ensure that we don't perform any reads/writes from uninitialized memory blocks.@guipublic I think you originally wrote this logic, can you explain the motivation behind the old behaviour in case I'm missing something?
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cargo fmton default settings.