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Merged
multiplemonomials merged 9 commits into from
May 23, 2025
Merged

Accelerate STM32 QSPI read/write operations by DMA #456

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44a1de2
Accelerate QSPI read/write operations by DMA
wdx04 Apr 27, 2025
8fad66e
fix stm_dma_utils compliation errors for MCUs with shared IRQs
wdx04 Apr 28, 2025
59be34a
changed sourceinc/destinationinc settings for MDMA
wdx04 May 10, 2025
0419daa
Merge branch 'master' into stm32-qspi-dma
wdx04 May 10, 2025
c2d2302
fixed compliation errors after merging
wdx04 May 10, 2025
5e03d61
do not use semaphore when RTOS is not available
wdx04 May 12, 2025
7ac16fa
Merge branch 'mbed-ce:master' into stm32-qspi-dma
wdx04 May 16, 2025
853be94
use macro __SCB_DCACHE_LINE_SIZE to allocate cache-aligned buffer for…
wdx04 May 23, 2025
92955b7
define split_buffer_by_cacheline only when DCACHE is available
wdx04 May 23, 2025
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3 changes: 3 additions & 0 deletions targets/TARGET_STM/TARGET_STM32F4/objects.h
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Original file line number Diff line number Diff line change
Expand Up @@ -28,6 +28,8 @@
#include "stm32f4xx_ll_rtc.h"
#include "stm32f4xx_ll_rcc.h"

#include "stm_dma_info.h"

#ifdef __cplusplus
extern "C" {
#endif
Expand Down Expand Up @@ -150,6 +152,7 @@ struct qspi_s {
PinName io3;
PinName sclk;
PinName ssel;
bool dmaInitialized;
};
#endif

Expand Down
5 changes: 5 additions & 0 deletions targets/TARGET_STM/TARGET_STM32F4/stm_dma_info.h
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Expand Up @@ -48,4 +48,9 @@ static const DMALinkInfo SPIRxDMALinks[] = {
{2, 6, 1}, // SPI6 Rx is DMA2 Stream 6 Channel 1
};

/// Mapping from QSPI index to DMA link info
static const DMALinkInfo QSPIDMALinks[] = {
{2, 7, 3}, // QUADSPI is DMA2 Stream 7 Channel 3
};

#endif //MBED_OS_STM_DMA_INFO_H
3 changes: 3 additions & 0 deletions targets/TARGET_STM/TARGET_STM32F7/objects.h
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Expand Up @@ -42,6 +42,8 @@
#include "stm32f7xx_ll_pwr.h"
#include "stm32f7xx_ll_rcc.h"

#include "stm_dma_info.h"

#ifdef __cplusplus
extern "C" {
#endif
Expand Down Expand Up @@ -124,6 +126,7 @@ struct qspi_s {
PinName io3;
PinName sclk;
PinName ssel;
bool dmaInitialized;
};
#endif

Expand Down
5 changes: 5 additions & 0 deletions targets/TARGET_STM/TARGET_STM32F7/stm_dma_info.h
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Expand Up @@ -48,4 +48,9 @@ static const DMALinkInfo SPIRxDMALinks[] = {
{2, 6, 1}, // SPI6 Rx is DMA2 Stream 6 Channel 1
};

/// Mapping from QSPI index to DMA link info
static const DMALinkInfo QSPIDMALinks[] = {
{2, 7, 3}, // QUADSPI is DMA2 Stream 7 Channel 3
};

#endif //MBED_OS_STM_DMA_INFO_H
3 changes: 3 additions & 0 deletions targets/TARGET_STM/TARGET_STM32G4/objects.h
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Expand Up @@ -26,6 +26,8 @@
#include "stm32g4xx_ll_rtc.h"
#include "stm32g4xx_ll_rcc.h"

#include "stm_dma_info.h"

#ifdef __cplusplus
extern "C" {
#endif
Expand Down Expand Up @@ -106,6 +108,7 @@ struct qspi_s {
PinName io3;
PinName sclk;
PinName ssel;
bool dmaInitialized;
};
#endif

Expand Down
6 changes: 6 additions & 0 deletions targets/TARGET_STM/TARGET_STM32G4/stm_dma_info.h
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Expand Up @@ -44,5 +44,11 @@ static const DMALinkInfo SPIRxDMALinks[] = {
#endif
};

/// Mapping from QSPI index to DMA link info
static const DMALinkInfo QSPIDMALinks[] = {
#if defined(QUADSPI)
{1, 7, DMA_REQUEST_QUADSPI },
#endif
};

#endif //MBED_OS_STM_DMA_INFO_H
6 changes: 6 additions & 0 deletions targets/TARGET_STM/TARGET_STM32H7/objects.h
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Expand Up @@ -31,6 +31,8 @@
#include "stm32h7xx_ll_pwr.h"
#include "stm32h7xx_ll_system.h"

#include "stm_dma_info.h"

#ifdef __cplusplus
extern "C" {
#endif
Expand Down Expand Up @@ -94,6 +96,8 @@ struct qspi_s {
PinName io3;
PinName sclk;
PinName ssel;
IRQn_Type qspiIRQ;
bool dmaInitialized;
};
#endif

Expand All @@ -112,6 +116,8 @@ struct ospi_s {
PinName sclk;
PinName ssel;
PinName dqs;
IRQn_Type ospiIRQ;
bool dmaInitialized;
};
#endif

Expand Down
12 changes: 12 additions & 0 deletions targets/TARGET_STM/TARGET_STM32H7/stm_dma_info.h
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Expand Up @@ -42,5 +42,17 @@ static const DMALinkInfo SPIRxDMALinks[] = {
{2, 0, DMA_REQUEST_SPI5_RX},
};

/// Mapping from QSPI/OSPI index to DMA link info
#if defined(OCTOSPI1)
static const DMALinkInfo OSPIDMALinks[] = {
{4, 0, MDMA_REQUEST_OCTOSPI1_FIFO_TH},
{4, 1, MDMA_REQUEST_OCTOSPI2_FIFO_TH}
};
#else
static const DMALinkInfo QSPIDMALinks[] = {
{4, 0, MDMA_REQUEST_QUADSPI_FIFO_TH},
};
#endif


#endif //MBED_OS_STM_DMA_INFO_H
6 changes: 6 additions & 0 deletions targets/TARGET_STM/TARGET_STM32L4/objects.h
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Expand Up @@ -31,6 +31,8 @@
#include "stm32l4xx_ll_pwr.h"
#include "stm32l4xx_ll_rcc.h"

#include "stm_dma_utils.h"

#ifdef __cplusplus
extern "C" {
#endif
Expand Down Expand Up @@ -106,6 +108,7 @@ struct can_s {
struct qspi_s {
#if defined(OCTOSPI1)
OSPI_HandleTypeDef handle;
IRQn_Type qspiIRQ;
#else
QSPI_HandleTypeDef handle;
#endif
Expand All @@ -116,6 +119,7 @@ struct qspi_s {
PinName io3;
PinName sclk;
PinName ssel;
bool dmaInitialized;
};
#endif

Expand All @@ -134,6 +138,8 @@ struct ospi_s {
PinName sclk;
PinName ssel;
PinName dqs;
IRQn_Type ospiIRQ;
bool dmaInitialized;
};
#endif

Expand Down
11 changes: 11 additions & 0 deletions targets/TARGET_STM/TARGET_STM32L4/stm_dma_info.h
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Expand Up @@ -40,6 +40,12 @@ static const DMALinkInfo SPIRxDMALinks[] = {
{1, 6, DMA_REQUEST_SPI3_RX}
};

/// Mapping from OSPI index to DMA link info
static const DMALinkInfo OSPIDMALinks[] = {
{1, 7, DMA_REQUEST_OCTOSPI1},
{2, 1, DMA_REQUEST_OCTOSPI2},
};

#else


Expand All @@ -60,6 +66,11 @@ static const DMALinkInfo SPIRxDMALinks[] = {
{2, 1, 3} // SPI3 Rx is DMA2 Ch1 Request 3
};

/// Mapping from QSPI index to DMA link info
static const DMALinkInfo QSPIDMALinks[] = {
{2, 7, 3}, // QUADSPI is DMA2 Ch7 Request 3
};

#endif

#endif //MBED_OS_STM_DMA_INFO_H
6 changes: 6 additions & 0 deletions targets/TARGET_STM/TARGET_STM32L5/objects.h
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Expand Up @@ -27,6 +27,8 @@
#include "stm32l5xx_ll_pwr.h"
#include "stm32l5xx_ll_rcc.h"

#include "stm_dma_info.h"

#ifdef __cplusplus
extern "C" {
#endif
Expand Down Expand Up @@ -112,6 +114,8 @@ struct qspi_s {
PinName io3;
PinName sclk;
PinName ssel;
IRQn_Type qspiIRQ;
bool dmaInitialized;
};

struct ospi_s {
Expand All @@ -128,6 +132,8 @@ struct ospi_s {
PinName sclk;
PinName ssel;
PinName dqs;
IRQn_Type ospiIRQ;
bool dmaInitialized;
};

#ifdef __cplusplus
Expand Down
4 changes: 4 additions & 0 deletions targets/TARGET_STM/TARGET_STM32L5/stm_dma_info.h
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Expand Up @@ -38,5 +38,9 @@ static const DMALinkInfo SPIRxDMALinks[] = {
{1, 6, DMA_REQUEST_SPI3_RX},
};

/// Mapping from OSPI index to DMA link info
static const DMALinkInfo OSPIDMALinks[] = {
{1, 7, DMA_REQUEST_OCTOSPI1},
};

#endif //MBED_OS_STM_DMA_INFO_H
6 changes: 6 additions & 0 deletions targets/TARGET_STM/TARGET_STM32U5/objects.h
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Expand Up @@ -27,6 +27,8 @@
#include "stm32u5xx_ll_pwr.h"
#include "stm32u5xx_ll_rcc.h"

#include "stm_dma_info.h"

#ifdef __cplusplus
extern "C" {
#endif
Expand Down Expand Up @@ -112,6 +114,8 @@ struct qspi_s {
PinName io3;
PinName sclk;
PinName ssel;
IRQn_Type qspiIRQ;
bool dmaInitialized;
};

struct ospi_s {
Expand All @@ -128,6 +132,8 @@ struct ospi_s {
PinName sclk;
PinName ssel;
PinName dqs;
IRQn_Type ospiIRQ;
bool dmaInitialized;
};

#ifdef __cplusplus
Expand Down
5 changes: 5 additions & 0 deletions targets/TARGET_STM/TARGET_STM32U5/stm_dma_info.h
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Expand Up @@ -38,5 +38,10 @@ static const DMALinkInfo SPIRxDMALinks[] = {
{1, 5, GPDMA1_REQUEST_SPI3_TX}
};

/// Mapping from OSPI index to DMA link info
static const DMALinkInfo OSPIDMALinks[] = {
{1, 6, GPDMA1_REQUEST_OCTOSPI1},
{1, 7, GPDMA1_REQUEST_OCTOSPI2}
};

#endif //MBED_OS_STM_DMA_INFO_H
3 changes: 3 additions & 0 deletions targets/TARGET_STM/TARGET_STM32WB/objects.h
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Expand Up @@ -33,6 +33,8 @@
#error "BLE FEATURE CANNOT BE REMOVED"
#endif

#include "stm_dma_info.h"

#ifdef __cplusplus
extern "C" {
#endif
Expand Down Expand Up @@ -98,6 +100,7 @@ struct qspi_s {
PinName io3;
PinName sclk;
PinName ssel;
bool dmaInitialized;
};
#endif

Expand Down
5 changes: 5 additions & 0 deletions targets/TARGET_STM/TARGET_STM32WB/stm_dma_info.h
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Expand Up @@ -40,5 +40,10 @@ static const DMALinkInfo SPIRxDMALinks[] = {
#endif
};

static const DMALinkInfo QSPIDMALinks[] = {
#if defined(QUADSPI)
{1, 5, DMA_REQUEST_QUADSPI},
#endif
};

#endif //MBED_OS_STM_DMA_INFO_H
1 change: 1 addition & 0 deletions targets/TARGET_STM/ospi_api.c
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Expand Up @@ -483,6 +483,7 @@ ospi_status_t ospi_frequency(ospi_t *obj, int hz)

obj->handle.Init.ClockPrescaler = div;

HAL_OSPI_DeInit(&obj->handle);
if (HAL_OSPI_Init(&obj->handle) != HAL_OK) {
tr_error("HAL_OSPI_Init error");
status = OSPI_STATUS_ERROR;
Expand Down
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