Accelerate STM32 QSPI read/write operations by DMA #456
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Support all STM32 Families with QSPI/OSPI HAL API
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multiplemonomials
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Nice work on this! Really appreciate this getting added! Just a few comments here and there.
wait on a sempahore for QSPI DMA operations changed FATFileSystem to use 32byte-aligned allocation enhanced D-Cache consistency for STM32F7/H7 families
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Looks good! Just a few last things
… FATFileSystem added a split_buffer_by_cacheline function to split a buffer into cache-aligned parts and cache-unaligned parts added a QSPI_DMA_THRESHOLD_BYTES macro to define the minimum number of bytes to be transferred using DMA
multiplemonomials
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May 23, 2025
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Nice work on this!
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Summary of changes
Added STM32H7 MDMA support to stm32_dma_utils.
Faster QSPI read/write speed using DMA.
The acceleration ratio is between 5x and 10x, depending on the microcontroller chip.
No modification is needed on user code.
This is suitable for filesystem access on QSPI Flash chips, or for driving some LCDs with QSPI interface.
Tested on at least one board of the following STM32 Families: F4, F7, L4, L4+, L5, G4, WB, U5, H7 with QSPI, H7 with OSPI.
Impact of changes
No.
Migration actions required
No.
Documentation
The QSPI Flash uses one DMA channel on the microcontroller.
There's no confict with existing SPI DMA links.
Some sequential read performance data:
(NUCLEO boards are tested with an external W25Q128FV module)
Pull request type
Test results
All boards are tested by filling the flash with "55 AA" pattern and then read out.
Discovery boards and custom boards are additionally tested by creating a FAT filesystem on the QSPI Flash and writing a 3.1MB binary file, then read it out and check the CRC.