[DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE by manueldun · Pull Request #182207 · llvm/llvm-project

manueldun · 2026-02-19T01:49:38Z

This is my first pr specifically for llvm
Fixes #181657
Allows the isKnownToBeAPowerOfTwo function to handle BSWAP and BITREVERSE dag operations.
Any feedback is welcome.

github-actions · 2026-02-19T01:49:57Z

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llvmbot · 2026-02-19T01:50:27Z

@llvm/pr-subscribers-backend-x86

@llvm/pr-subscribers-llvm-selectiondag

Author: Manuel Dun (manueldun)

Changes

This is my first pr specifically for llvm
Fixes #181657
Allows the isKnownToBeAPowerOfTwo function to handle BSWAP and BITREVERSE dag operations.
Any feedback is welcome.

Full diff: https://github.com/llvm/llvm-project/pull/182207.diff

2 Files Affected:

(modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (+4)
(modified) llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp (+11)

diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 581553d41cb6d..b24468fbc42a4 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -4762,6 +4762,10 @@ bool SelectionDAG::isKnownToBeAPowerOfTwo(SDValue Val,
         isKnownToBeAPowerOfTwo(Val.getOperand(0), /*OrZero=*/false, Depth + 1))
       return true;
     break;
+  case ISD::BSWAP:
+  case ISD::BITREVERSE:
+    isKnownToBeAPowerOfTwo(Val.getOperand(0), /*OrZero=*/false, Depth + 1);
+    break;
   }
 
   // More could be done here, though the above checks are enough
diff --git a/llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp b/llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
index b2b8dfb0c21fc..0fa4b9dcbcbf5 100644
--- a/llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
+++ b/llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
@@ -914,6 +914,17 @@ TEST_F(AArch64SelectionDAGTest, KnownToBeAPowerOfTwo_Constants) {
   EXPECT_TRUE(DAG->isKnownToBeAPowerOfTwo(SplatBig, /*OrZero=*/true));
 }
 
+TEST_F(AArch64SelectionDAGTest, KnownToBeAPowerOfTwo_BSWAP_BITREVERSE) {
+  SDLoc Loc;
+  auto Cst4 = DAG->getConstant(4, Loc, MVT::i32);
+  auto Int32Vt = MVT::i32;
+  auto BSwapOp = DAG->getNode(ISD::BSWAP, Loc, Int32Vt, Cst4);
+  EXPECT_TRUE(DAG->isKnownToBeAPowerOfTwo(BSwapOp, false));
+
+  auto BReverseOp = DAG->getNode(ISD::BSWAP, Loc, Int32Vt, BSwapOp);
+  EXPECT_TRUE(DAG->isKnownToBeAPowerOfTwo(BReverseOp, false));
+}
+
 TEST_F(AArch64SelectionDAGTest, KnownToBeAPowerOfTwo_Select) {
   SDLoc Loc;
   auto Cst0 = DAG->getConstant(0, Loc, MVT::i32);

topperc · 2026-02-19T01:54:52Z

+  auto BSwapOp = DAG->getNode(ISD::BSWAP, Loc, Int32Vt, Cst4);
+  EXPECT_TRUE(DAG->isKnownToBeAPowerOfTwo(BSwapOp, false));
+
+  auto BReverseOp = DAG->getNode(ISD::BSWAP, Loc, Int32Vt, BSwapOp);


Forgot to change the opcode to ISD::BITREVERSE?

Still need vector tests (with and without DemandedElts) and OrZero handling tests

RKSimon · 2026-02-19T09:19:16Z

@@ -4762,6 +4762,10 @@ bool SelectionDAG::isKnownToBeAPowerOfTwo(SDValue Val,
        isKnownToBeAPowerOfTwo(Val.getOperand(0), /*OrZero=*/false, Depth + 1))
      return true;
    break;
+  case ISD::BSWAP:
+  case ISD::BITREVERSE:
+    isKnownToBeAPowerOfTwo(Val.getOperand(0), /*OrZero=*/false, Depth + 1);


Missing return, DemandedElts and OrZero handling

RKSimon · 2026-02-19T09:20:10Z

+  auto BSwapOp = DAG->getNode(ISD::BSWAP, Loc, Int32Vt, Cst4);
+  EXPECT_TRUE(DAG->isKnownToBeAPowerOfTwo(BSwapOp, false));
+
+  auto BReverseOp = DAG->getNode(ISD::BSWAP, Loc, Int32Vt, BSwapOp);


Still need vector tests (with and without DemandedElts) and OrZero handling tests

arsenm · 2026-02-19T10:16:42Z

@@ -914,6 +914,17 @@ TEST_F(AArch64SelectionDAGTest, KnownToBeAPowerOfTwo_Constants) {
  EXPECT_TRUE(DAG->isKnownToBeAPowerOfTwo(SplatBig, /*OrZero=*/true));
 }

+TEST_F(AArch64SelectionDAGTest, KnownToBeAPowerOfTwo_BSWAP_BITREVERSE) {
+  SDLoc Loc;
+  auto Cst4 = DAG->getConstant(4, Loc, MVT::i32);


can I ask why no auto? are we talking about auto type deduction?

The style guide recommends avoiding them except for explicit casts or where the type is obvious:
https://llvm.org/docs/CodingStandards.html#use-auto-type-deduction-to-make-code-more-readable

jayfoad · 2026-02-19T12:00:37Z

+  case ISD::BSWAP:
+  case ISD::BITREVERSE:


Merge this into the ROTL/ROTR case above, which could also pass through the orZero flag?

manueldun · 2026-02-20T14:10:22Z

How about now? waiting for feedback

topperc · 2026-02-20T18:17:50Z

+
+  SDLoc Loc;
+  SDValue Cst4 = DAG->getConstant(4, Loc, MVT::i32);
+  SDValue BSwapOp = DAG->getNode(ISD::BSWAP, Loc, MVT::i32, Cst4);


Doesn't creating a BSWAP with constant inputs constant fold to a new constant inside getNode? Meaning the call to isKnownToBeAPowerOfTwo is being called on a constant, not on a BSWAP node?

I copied this block locally and it passes without the change to SelectionDAG.cpp.

To address this I tried to use an operator that cant be folded to a constant (eg. bitcast) and use the result to a bswap, but isKnownToBeAPowerOfTwo does not return true with and without the changes.
This is what I tried:

SDLoc Loc; SDValue Cst4 = DAG->getConstant(4, Loc, MVT::i32); EVT InTypes[] = {MVT::i32,MVT::i32}; SDVTList IntTypes{InTypes,2}; SDValue CastOp = DAG->getNode(ISD::BITCAST,Loc,IntTypes,Cst4); SDValue BSwapOp = DAG->getNode(ISD::BSWAP, Loc, MVT::i32, CastOp); EXPECT_TRUE(DAG->isKnownToBeAPowerOfTwo(BSwapOp, /*OrZero=*/false));

As you can see, I cast an i32 to an i32 (a noop)
I wonder if something similar to this aproach would work.

You will need to use another isKnownToBeAPowerOfTwo pattern inside to handle the OrZero.

Try - SELECT/VSELECT - take part of a test from KnownToBeAPowerOfTwo_Select and wrap the BSWAP/BITREVERSE nodes around them. Should make it easy to do OrZero=true/false and DemandedElts tests

RKSimon

You

RKSimon · 2026-02-23T12:16:39Z

+
+  SDLoc Loc;
+  SDValue Cst4 = DAG->getConstant(4, Loc, MVT::i32);
+  SDValue BSwapOp = DAG->getNode(ISD::BSWAP, Loc, MVT::i32, Cst4);


You will need to use another isKnownToBeAPowerOfTwo pattern inside to handle the OrZero.

Try - SELECT/VSELECT - take part of a test from KnownToBeAPowerOfTwo_Select and wrap the BSWAP/BITREVERSE nodes around them. Should make it easy to do OrZero=true/false and DemandedElts tests

RKSimon · 2026-02-25T18:02:03Z

@@ -914,6 +914,113 @@ TEST_F(AArch64SelectionDAGTest, KnownToBeAPowerOfTwo_Constants) {
  EXPECT_TRUE(DAG->isKnownToBeAPowerOfTwo(SplatBig, /*OrZero=*/true));
 }

+TEST_F(AArch64SelectionDAGTest, KnownToBeAPowerOfTwo_BSWAP_BITREVERSE) {


We can instead add this to KnownToBeAPowerOfTwo_Select (rename KnownToBeAPowerOfTwo_Ops?)

And just wraps some of the existing interesting VSelect values with bitreverse/bswap and repeat the same true/false test

This will scale much better than repeating so much duplicated setup code/.

RKSimon

Fix merge failure

manueldun · 2026-02-25T19:47:06Z

does the merge commit need to be handle in some way? (like squashing?)

RKSimon · 2026-02-25T21:19:12Z

Merge is much preferred over rebase as rebase can lose review comments

manueldun · 2026-02-26T00:35:33Z

Sorry, it is my first time resolving a merge conflict, how is the correct way to do so?

RKSimon

#181882 has now landed so you should be able to create IR tests instead of unit tests

manueldun · 2026-02-26T14:20:43Z

Sorry for squashing commits, I assumed it was the way to go, let me create the tests and resolve conflicts

manueldun · 2026-02-28T12:40:10Z

I will try to not do more rebasing from here

RKSimon · 2026-02-28T13:35:20Z

I will try to not do more rebasing from here

np - re-request a review when you're ready

RKSimon · 2026-03-01T11:54:03Z

please coordinate with @mirimmad as you seem to be dealing with #182744 as well

RKSimon · 2026-03-03T12:01:11Z

-  %and = and i32 %x, %d
-  %r = icmp eq i32 %and, %d
-  ret i1 %r
-}


don't remove existing test coverage

sorry, I removed the wrong test, my bad

RKSimon · 2026-03-03T12:01:46Z

+  %x_add_y = add i32 %x, %rot_y
+  %r = and i32 %x_add_y, %rot_y
+  ret i32 %r
+}


remove this new rot test coverage

RKSimon · 2026-03-03T12:02:10Z

+  %x_add_y = add i32 %x, %rot_y
+  %r = and i32 %x_add_y, %rot_y
+  ret i32 %r
+}


remove this new rot test coverage

RKSimon · 2026-03-04T17:02:02Z

+  %sel = select i1 %cmp, i32 4, i32 8
+  %swap = call i32 @llvm.bswap.i32(i32 %sel)
+  %rev = call i32 @llvm.bitreverse.i32(i32 %sel)
+  %res = urem i32 %a1, %swap


remove swap and use rev

RKSimon · 2026-03-04T17:02:25Z

+; CHECK-NEXT:    retq
+  %cmp = icmp sgt <4 x i32> zeroinitializer, %a0
+  %sel = select <4 x i1> %cmp, <4 x i32> <i32 4, i32 2, i32 1, i32 0>, <4 x i32> <i32 8, i32 4, i32 2, i32 -1>
+  %swap = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %sel)


Suggested change

%swap = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %sel)

%rev = call <4 x i32> @llvm.bitreverse.v4i32(<4 x i32> %sel)

RKSimon

LGTM

github-actions · 2026-03-04T20:21:16Z

@manueldun Congratulations on having your first Pull Request (PR) merged into the LLVM Project!

Your changes will be combined with recent changes from other authors, then tested by our build bots. If there is a problem with a build, you may receive a report in an email or a comment on this PR.

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If your change does cause a problem, it may be reverted, or you can revert it yourself. This is a normal part of LLVM development. You can fix your changes and open a new PR to merge them again.

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…of 2 after BSWAP/BITREVERSE (llvm#182207) This is my first pr specifically for llvm Fixes llvm#181657 Allows the isKnownToBeAPowerOfTwo function to handle BSWAP and BITREVERSE dag operations.

llvmbot added the llvm:SelectionDAG SelectionDAGISel as well label Feb 19, 2026

topperc reviewed Feb 19, 2026

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Comment thread llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Outdated

topperc reviewed Feb 19, 2026

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RKSimon requested changes Feb 19, 2026

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arsenm reviewed Feb 19, 2026

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RKSimon changed the title ~~Power of 2 SDValue is known to be power of 2 after dag ops BSWAP/BITREVERSE~~ [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE Feb 19, 2026

jayfoad reviewed Feb 19, 2026

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manueldun force-pushed the isKnownBSwapBReverse branch from 7618fd8 to dc45e74 Compare February 20, 2026 14:07

RKSimon self-requested a review February 20, 2026 15:07

topperc reviewed Feb 20, 2026

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manueldun force-pushed the isKnownBSwapBReverse branch from dc45e74 to 6df9786 Compare February 25, 2026 16:20

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manueldun force-pushed the isKnownBSwapBReverse branch from 6df9786 to 869886c Compare February 25, 2026 18:38

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manueldun force-pushed the isKnownBSwapBReverse branch from 747ddc5 to 869886c Compare February 26, 2026 00:12

RKSimon requested changes Feb 26, 2026

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Comment thread llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

[DAG] isKnownToBeAPowerOfTwo function now handle BSwap and BitReverse

b069700

manueldun force-pushed the isKnownBSwapBReverse branch from 34f2d7c to b069700 Compare February 28, 2026 12:39

llvmbot added the backend:X86 label Feb 28, 2026

manueldun requested a review from RKSimon February 28, 2026 13:47

manueldun requested review from arsenm, jayfoad and topperc February 28, 2026 18:30

manueldun and others added 2 commits March 1, 2026 15:42

Merge branch 'main' into isKnownBSwapBReverse

dd56bed

Added test cases that use demanded elements for bswap and bitreverse

d1c6512

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Comment thread llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Comment thread llvm/test/CodeGen/X86/known-pow2.ll

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Comment thread llvm/test/CodeGen/X86/known-pow2.ll Outdated

Changed to urem pattern instead

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manueldun requested a review from RKSimon March 2, 2026 14:22

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manueldun added 2 commits March 3, 2026 10:53

Focusing on BSwap and BitReverse only

0e0fa71

Removed rot tests that don't correspond to this pr

45cc6ca

manueldun force-pushed the isKnownBSwapBReverse branch from 6b5d997 to 45cc6ca Compare March 3, 2026 15:24

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RKSimon requested changes Mar 4, 2026

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Fixed bitreverse tests

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manueldun requested a review from RKSimon March 4, 2026 18:01

RKSimon approved these changes Mar 4, 2026

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Merge branch 'main' into isKnownBSwapBReverse

903f03d

RKSimon enabled auto-merge (squash) March 4, 2026 19:51

RKSimon merged commit 5c08616 into llvm:main Mar 4, 2026
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	%swap = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %sel)
	%rev = call <4 x i32> @llvm.bitreverse.v4i32(<4 x i32> %sel)

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