expandFMINIMUM_FMAXIMUM: Use FMINIMUMNUM and FMAXIMUMNUM if possible

[wzssyqa]

Hexagon is an example.

[llvmbot]

@llvm/pr-subscribers-backend-nvptx
@llvm/pr-subscribers-backend-hexagon

@llvm/pr-subscribers-llvm-selectiondag

Author: YunQiang Su (wzssyqa)

Changes

Hexagon is the example

---

Full diff: https://github.com/llvm/llvm-project/pull/180487.diff

3 Files Affected:

• (modified) llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp (+7-3)
• (modified) llvm/test/CodeGen/Hexagon/fminmax-v67.ll (+39)
• (modified) llvm/test/CodeGen/Hexagon/fminmax.ll (+18)

diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index aee9f0d36b3f0..23f9f4f5d06b2 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -8868,15 +8868,19 @@ SDValue TargetLowering::expandFMINIMUM_FMAXIMUM(SDNode *N,
   // First, implement comparison not propagating NaN. If no native fmin or fmax
   // available, use plain select with setcc instead.
   SDValue MinMax;
-  unsigned CompOpcIeee = IsMax ? ISD::FMAXNUM_IEEE : ISD::FMINNUM_IEEE;
+  unsigned CompOpcIeee2008 = IsMax ? ISD::FMAXNUM_IEEE : ISD::FMINNUM_IEEE;
+  unsigned CompOpcIeee2019Num = IsMax ? ISD::FMAXIMUMNUM : ISD::FMINIMUMNUM;
   unsigned CompOpc = IsMax ? ISD::FMAXNUM : ISD::FMINNUM;
 
   // FIXME: We should probably define fminnum/fmaxnum variants with correct
   // signed zero behavior.
   bool MinMaxMustRespectOrderedZero = false;
 
-  if (isOperationLegalOrCustom(CompOpcIeee, VT)) {
-    MinMax = DAG.getNode(CompOpcIeee, DL, VT, LHS, RHS, Flags);
+  if (isOperationLegalOrCustom(CompOpcIeee2008, VT)) {
+    MinMax = DAG.getNode(CompOpcIeee2008, DL, VT, LHS, RHS, Flags);
+    MinMaxMustRespectOrderedZero = true;
+  } else if (isOperationLegalOrCustom(CompOpcIeee2019Num, VT)) {
+    MinMax = DAG.getNode(CompOpcIeee2019Num, DL, VT, LHS, RHS, Flags);
     MinMaxMustRespectOrderedZero = true;
   } else if (isOperationLegalOrCustom(CompOpc, VT)) {
     MinMax = DAG.getNode(CompOpc, DL, VT, LHS, RHS, Flags);
diff --git a/llvm/test/CodeGen/Hexagon/fminmax-v67.ll b/llvm/test/CodeGen/Hexagon/fminmax-v67.ll
index 8ce34210c38cf..94810e32f0572 100644
--- a/llvm/test/CodeGen/Hexagon/fminmax-v67.ll
+++ b/llvm/test/CodeGen/Hexagon/fminmax-v67.ll
@@ -73,6 +73,45 @@ entry:
   ret float %0
 }
 
+; CHECK-LABEL: t1_2019
+; CHECK: dfmax
+; CHECK: dfcmp.uo
+
+define dso_local double @t1_2019(double %a, double %b) local_unnamed_addr {
+entry:
+  %0 = tail call double @llvm.maximum.f64(double %a, double %b)
+  ret double %0
+}
+
+; CHECK-LABEL: t2_2019
+; CHECK: dfmin
+; CHECK: dfcmp.uo
+
+define dso_local double @t2_2019(double %a, double %b) local_unnamed_addr {
+entry:
+  %0 = tail call double @llvm.minimum.f64(double %a, double %b)
+  ret double %0
+}
+
+; CHECK-LABEL: t3_2019
+; CHECK: sfmax
+; CHECK: sfcmp.uo
+
+define dso_local float @t3_2019(float %a, float %b) local_unnamed_addr {
+entry:
+  %0 = tail call float @llvm.maximum.f32(float %a, float %b)
+  ret float %0
+}
+
+; CHECK-LABEL: t4_2019
+; CHECK: sfmin
+; CHECK: sfcmp.uo
+
+define dso_local float @t4_2019(float %a, float %b) local_unnamed_addr {
+entry:
+  %0 = tail call float @llvm.minimum.f32(float %a, float %b)
+  ret float %0
+}
 
 declare double @llvm.minnum.f64(double, double) #1
 declare double @llvm.maxnum.f64(double, double) #1
diff --git a/llvm/test/CodeGen/Hexagon/fminmax.ll b/llvm/test/CodeGen/Hexagon/fminmax.ll
index 807b6815fa47e..350fd0fa79be8 100644
--- a/llvm/test/CodeGen/Hexagon/fminmax.ll
+++ b/llvm/test/CodeGen/Hexagon/fminmax.ll
@@ -51,6 +51,24 @@ entry:
   ret float %call
 }
 
+; CHECK-LABEL: minimum
+; CHECK: sfmin
+; CHECK: sfcmp.uo
+define float @minimum(float %x, float %y) #0 {
+entry:
+  %call = tail call float @llvm.minimum.f32(float %x, float %y) #1
+  ret float %call
+}
+
+; CHECK-LABEL: maximum
+; CHECK: sfmax
+; CHECK: sfcmp.uo
+define float @maximum(float %x, float %y) #0 {
+entry:
+  %call = tail call float @llvm.maximum.f32(float %x, float %y) #1
+  ret float %call
+}
+
 
 declare float @fminf(float, float) #0
 declare float @fmaxf(float, float) #0

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