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10 changes: 7 additions & 3 deletions llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -8868,15 +8868,19 @@ SDValue TargetLowering::expandFMINIMUM_FMAXIMUM(SDNode *N,
// First, implement comparison not propagating NaN. If no native fmin or fmax
// available, use plain select with setcc instead.
SDValue MinMax;
unsigned CompOpcIeee = IsMax ? ISD::FMAXNUM_IEEE : ISD::FMINNUM_IEEE;
unsigned CompOpcIeee2008 = IsMax ? ISD::FMAXNUM_IEEE : ISD::FMINNUM_IEEE;
unsigned CompOpcIeee2019Num = IsMax ? ISD::FMAXIMUMNUM : ISD::FMINIMUMNUM;
unsigned CompOpc = IsMax ? ISD::FMAXNUM : ISD::FMINNUM;

// FIXME: We should probably define fminnum/fmaxnum variants with correct
// signed zero behavior.
bool MinMaxMustRespectOrderedZero = false;

if (isOperationLegalOrCustom(CompOpcIeee, VT)) {
MinMax = DAG.getNode(CompOpcIeee, DL, VT, LHS, RHS, Flags);
if (isOperationLegalOrCustom(CompOpcIeee2008, VT)) {
MinMax = DAG.getNode(CompOpcIeee2008, DL, VT, LHS, RHS, Flags);
MinMaxMustRespectOrderedZero = true;
} else if (isOperationLegalOrCustom(CompOpcIeee2019Num, VT)) {
MinMax = DAG.getNode(CompOpcIeee2019Num, DL, VT, LHS, RHS, Flags);
MinMaxMustRespectOrderedZero = true;
} else if (isOperationLegalOrCustom(CompOpc, VT)) {
MinMax = DAG.getNode(CompOpc, DL, VT, LHS, RHS, Flags);
Expand Down
39 changes: 39 additions & 0 deletions llvm/test/CodeGen/Hexagon/fminmax-v67.ll
Original file line number Diff line number Diff line change
Expand Up @@ -73,6 +73,45 @@ entry:
ret float %0
}

; CHECK-LABEL: t1_2019
; CHECK: dfmax
; CHECK: dfcmp.uo

define dso_local double @t1_2019(double %a, double %b) local_unnamed_addr {
entry:
%0 = tail call double @llvm.maximum.f64(double %a, double %b)
ret double %0
}

; CHECK-LABEL: t2_2019
; CHECK: dfmin
; CHECK: dfcmp.uo

define dso_local double @t2_2019(double %a, double %b) local_unnamed_addr {
entry:
%0 = tail call double @llvm.minimum.f64(double %a, double %b)
ret double %0
}

; CHECK-LABEL: t3_2019
; CHECK: sfmax
; CHECK: sfcmp.uo

define dso_local float @t3_2019(float %a, float %b) local_unnamed_addr {
entry:
%0 = tail call float @llvm.maximum.f32(float %a, float %b)
ret float %0
}

; CHECK-LABEL: t4_2019
; CHECK: sfmin
; CHECK: sfcmp.uo

define dso_local float @t4_2019(float %a, float %b) local_unnamed_addr {
entry:
%0 = tail call float @llvm.minimum.f32(float %a, float %b)
ret float %0
}

declare double @llvm.minnum.f64(double, double) #1
declare double @llvm.maxnum.f64(double, double) #1
Expand Down
18 changes: 18 additions & 0 deletions llvm/test/CodeGen/Hexagon/fminmax.ll
Original file line number Diff line number Diff line change
Expand Up @@ -51,6 +51,24 @@ entry:
ret float %call
}

; CHECK-LABEL: minimum
; CHECK: sfmin
; CHECK: sfcmp.uo
define float @minimum(float %x, float %y) #0 {
entry:
%call = tail call float @llvm.minimum.f32(float %x, float %y) #1
ret float %call
}

; CHECK-LABEL: maximum
; CHECK: sfmax
; CHECK: sfcmp.uo
define float @maximum(float %x, float %y) #0 {
entry:
%call = tail call float @llvm.maximum.f32(float %x, float %y) #1
ret float %call
}


declare float @fminf(float, float) #0
declare float @fmaxf(float, float) #0
Expand Down
96 changes: 36 additions & 60 deletions llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
Original file line number Diff line number Diff line change
Expand Up @@ -1836,30 +1836,24 @@ define float @fmax_acq_rel_float_global_cta(ptr addrspace(1) %addr, float %val)
define float @fminimum_acq_rel_float_global_cta(ptr addrspace(1) %addr, float %val) {
; SM60-LABEL: fminimum_acq_rel_float_global_cta(
; SM60: {
; SM60-NEXT: .reg .pred %p<6>;
; SM60-NEXT: .reg .b32 %r<9>;
; SM60-NEXT: .reg .pred %p<3>;
; SM60-NEXT: .reg .b32 %r<6>;
; SM60-NEXT: .reg .b64 %rd<2>;
; SM60-EMPTY:
; SM60-NEXT: // %bb.0:
; SM60-NEXT: ld.param.b32 %r2, [fminimum_acq_rel_float_global_cta_param_1];
; SM60-NEXT: ld.param.b64 %rd1, [fminimum_acq_rel_float_global_cta_param_0];
; SM60-NEXT: membar.cta;
; SM60-NEXT: ld.global.b32 %r8, [%rd1];
; SM60-NEXT: setp.eq.b32 %p3, %r2, -2147483648;
; SM60-NEXT: ld.global.b32 %r5, [%rd1];
; SM60-NEXT: $L__BB64_1: // %atomicrmw.start
; SM60-NEXT: // =>This Inner Loop Header: Depth=1
; SM60-NEXT: setp.nan.f32 %p1, %r8, %r2;
; SM60-NEXT: min.f32 %r3, %r8, %r2;
; SM60-NEXT: setp.nan.f32 %p1, %r5, %r2;
; SM60-NEXT: min.f32 %r3, %r5, %r2;
; SM60-NEXT: selp.f32 %r4, 0f7FC00000, %r3, %p1;
; SM60-NEXT: setp.eq.b32 %p2, %r8, -2147483648;
; SM60-NEXT: selp.f32 %r5, %r8, %r4, %p2;
; SM60-NEXT: selp.f32 %r6, %r2, %r5, %p3;
; SM60-NEXT: setp.eq.f32 %p4, %r4, 0f00000000;
; SM60-NEXT: selp.f32 %r7, %r6, %r4, %p4;
; SM60-NEXT: atom.cta.global.cas.b32 %r1, [%rd1], %r8, %r7;
; SM60-NEXT: setp.ne.b32 %p5, %r1, %r8;
; SM60-NEXT: mov.b32 %r8, %r1;
; SM60-NEXT: @%p5 bra $L__BB64_1;
; SM60-NEXT: atom.cta.global.cas.b32 %r1, [%rd1], %r5, %r4;
; SM60-NEXT: setp.ne.b32 %p2, %r1, %r5;
; SM60-NEXT: mov.b32 %r5, %r1;
; SM60-NEXT: @%p2 bra $L__BB64_1;
; SM60-NEXT: // %bb.2: // %atomicrmw.end
; SM60-NEXT: membar.cta;
; SM60-NEXT: st.param.b32 [func_retval0], %r1;
Expand All @@ -1871,30 +1865,24 @@ define float @fminimum_acq_rel_float_global_cta(ptr addrspace(1) %addr, float %v
define float @fmaximum_acq_rel_float_global_cta(ptr addrspace(1) %addr, float %val) {
; SM60-LABEL: fmaximum_acq_rel_float_global_cta(
; SM60: {
; SM60-NEXT: .reg .pred %p<6>;
; SM60-NEXT: .reg .b32 %r<9>;
; SM60-NEXT: .reg .pred %p<3>;
; SM60-NEXT: .reg .b32 %r<6>;
; SM60-NEXT: .reg .b64 %rd<2>;
; SM60-EMPTY:
; SM60-NEXT: // %bb.0:
; SM60-NEXT: ld.param.b32 %r2, [fmaximum_acq_rel_float_global_cta_param_1];
; SM60-NEXT: ld.param.b64 %rd1, [fmaximum_acq_rel_float_global_cta_param_0];
; SM60-NEXT: membar.cta;
; SM60-NEXT: ld.global.b32 %r8, [%rd1];
; SM60-NEXT: setp.eq.b32 %p3, %r2, 0;
; SM60-NEXT: ld.global.b32 %r5, [%rd1];
; SM60-NEXT: $L__BB65_1: // %atomicrmw.start
; SM60-NEXT: // =>This Inner Loop Header: Depth=1
; SM60-NEXT: setp.nan.f32 %p1, %r8, %r2;
; SM60-NEXT: max.f32 %r3, %r8, %r2;
; SM60-NEXT: setp.nan.f32 %p1, %r5, %r2;
; SM60-NEXT: max.f32 %r3, %r5, %r2;
; SM60-NEXT: selp.f32 %r4, 0f7FC00000, %r3, %p1;
; SM60-NEXT: setp.eq.b32 %p2, %r8, 0;
; SM60-NEXT: selp.f32 %r5, %r8, %r4, %p2;
; SM60-NEXT: selp.f32 %r6, %r2, %r5, %p3;
; SM60-NEXT: setp.eq.f32 %p4, %r4, 0f00000000;
; SM60-NEXT: selp.f32 %r7, %r6, %r4, %p4;
; SM60-NEXT: atom.cta.global.cas.b32 %r1, [%rd1], %r8, %r7;
; SM60-NEXT: setp.ne.b32 %p5, %r1, %r8;
; SM60-NEXT: mov.b32 %r8, %r1;
; SM60-NEXT: @%p5 bra $L__BB65_1;
; SM60-NEXT: atom.cta.global.cas.b32 %r1, [%rd1], %r5, %r4;
; SM60-NEXT: setp.ne.b32 %p2, %r1, %r5;
; SM60-NEXT: mov.b32 %r5, %r1;
; SM60-NEXT: @%p2 bra $L__BB65_1;
; SM60-NEXT: // %bb.2: // %atomicrmw.end
; SM60-NEXT: membar.cta;
; SM60-NEXT: st.param.b32 [func_retval0], %r1;
Expand Down Expand Up @@ -1999,29 +1987,23 @@ define double @fmax_acq_rel_double_global_cta(ptr addrspace(1) %addr, double %va
define double @fminimum_acq_rel_double_global_cta(ptr addrspace(1) %addr, double %val) {
; SM60-LABEL: fminimum_acq_rel_double_global_cta(
; SM60: {
; SM60-NEXT: .reg .pred %p<6>;
; SM60-NEXT: .reg .b64 %rd<10>;
; SM60-NEXT: .reg .pred %p<3>;
; SM60-NEXT: .reg .b64 %rd<7>;
; SM60-EMPTY:
; SM60-NEXT: // %bb.0:
; SM60-NEXT: ld.param.b64 %rd3, [fminimum_acq_rel_double_global_cta_param_1];
; SM60-NEXT: ld.param.b64 %rd2, [fminimum_acq_rel_double_global_cta_param_0];
; SM60-NEXT: membar.cta;
; SM60-NEXT: ld.global.b64 %rd9, [%rd2];
; SM60-NEXT: setp.eq.b64 %p3, %rd3, -9223372036854775808;
; SM60-NEXT: ld.global.b64 %rd6, [%rd2];
; SM60-NEXT: $L__BB70_1: // %atomicrmw.start
; SM60-NEXT: // =>This Inner Loop Header: Depth=1
; SM60-NEXT: setp.nan.f64 %p1, %rd9, %rd3;
; SM60-NEXT: min.f64 %rd4, %rd9, %rd3;
; SM60-NEXT: setp.nan.f64 %p1, %rd6, %rd3;
; SM60-NEXT: min.f64 %rd4, %rd6, %rd3;
; SM60-NEXT: selp.f64 %rd5, 0d7FF8000000000000, %rd4, %p1;
; SM60-NEXT: setp.eq.b64 %p2, %rd9, -9223372036854775808;
; SM60-NEXT: selp.f64 %rd6, %rd9, %rd5, %p2;
; SM60-NEXT: selp.f64 %rd7, %rd3, %rd6, %p3;
; SM60-NEXT: setp.eq.f64 %p4, %rd5, 0d0000000000000000;
; SM60-NEXT: selp.f64 %rd8, %rd7, %rd5, %p4;
; SM60-NEXT: atom.cta.global.cas.b64 %rd1, [%rd2], %rd9, %rd8;
; SM60-NEXT: setp.ne.b64 %p5, %rd1, %rd9;
; SM60-NEXT: mov.b64 %rd9, %rd1;
; SM60-NEXT: @%p5 bra $L__BB70_1;
; SM60-NEXT: atom.cta.global.cas.b64 %rd1, [%rd2], %rd6, %rd5;
; SM60-NEXT: setp.ne.b64 %p2, %rd1, %rd6;
; SM60-NEXT: mov.b64 %rd6, %rd1;
; SM60-NEXT: @%p2 bra $L__BB70_1;
; SM60-NEXT: // %bb.2: // %atomicrmw.end
; SM60-NEXT: membar.cta;
; SM60-NEXT: st.param.b64 [func_retval0], %rd1;
Expand All @@ -2033,29 +2015,23 @@ define double @fminimum_acq_rel_double_global_cta(ptr addrspace(1) %addr, double
define double @fmaximum_acq_rel_double_global_cta(ptr addrspace(1) %addr, double %val) {
; SM60-LABEL: fmaximum_acq_rel_double_global_cta(
; SM60: {
; SM60-NEXT: .reg .pred %p<6>;
; SM60-NEXT: .reg .b64 %rd<10>;
; SM60-NEXT: .reg .pred %p<3>;
; SM60-NEXT: .reg .b64 %rd<7>;
; SM60-EMPTY:
; SM60-NEXT: // %bb.0:
; SM60-NEXT: ld.param.b64 %rd3, [fmaximum_acq_rel_double_global_cta_param_1];
; SM60-NEXT: ld.param.b64 %rd2, [fmaximum_acq_rel_double_global_cta_param_0];
; SM60-NEXT: membar.cta;
; SM60-NEXT: ld.global.b64 %rd9, [%rd2];
; SM60-NEXT: setp.eq.b64 %p3, %rd3, 0;
; SM60-NEXT: ld.global.b64 %rd6, [%rd2];
; SM60-NEXT: $L__BB71_1: // %atomicrmw.start
; SM60-NEXT: // =>This Inner Loop Header: Depth=1
; SM60-NEXT: setp.nan.f64 %p1, %rd9, %rd3;
; SM60-NEXT: max.f64 %rd4, %rd9, %rd3;
; SM60-NEXT: setp.nan.f64 %p1, %rd6, %rd3;
; SM60-NEXT: max.f64 %rd4, %rd6, %rd3;
; SM60-NEXT: selp.f64 %rd5, 0d7FF8000000000000, %rd4, %p1;
; SM60-NEXT: setp.eq.b64 %p2, %rd9, 0;
; SM60-NEXT: selp.f64 %rd6, %rd9, %rd5, %p2;
; SM60-NEXT: selp.f64 %rd7, %rd3, %rd6, %p3;
; SM60-NEXT: setp.eq.f64 %p4, %rd5, 0d0000000000000000;
; SM60-NEXT: selp.f64 %rd8, %rd7, %rd5, %p4;
; SM60-NEXT: atom.cta.global.cas.b64 %rd1, [%rd2], %rd9, %rd8;
; SM60-NEXT: setp.ne.b64 %p5, %rd1, %rd9;
; SM60-NEXT: mov.b64 %rd9, %rd1;
; SM60-NEXT: @%p5 bra $L__BB71_1;
; SM60-NEXT: atom.cta.global.cas.b64 %rd1, [%rd2], %rd6, %rd5;
; SM60-NEXT: setp.ne.b64 %p2, %rd1, %rd6;
; SM60-NEXT: mov.b64 %rd6, %rd1;
; SM60-NEXT: @%p2 bra $L__BB71_1;
; SM60-NEXT: // %bb.2: // %atomicrmw.end
; SM60-NEXT: membar.cta;
; SM60-NEXT: st.param.b64 [func_retval0], %rd1;
Expand Down
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