[SYCL][L0] Move command list cache usage under mutex#5874
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againull merged 2 commits intointel:syclfrom Mar 30, 2022
Merged
[SYCL][L0] Move command list cache usage under mutex#5874againull merged 2 commits intointel:syclfrom
againull merged 2 commits intointel:syclfrom
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For the example of usage that may cause issue please refer to assert_in_simulteneous_kernels E2E test. n queues that are working on the same device and on default context will work with the same zeCompute/CopyCommandListCache without protection since mutexes for queues are different buwhile cache is the same. Operator[] may trigger insertion and rehash so simulteneous access is not thread-safe. In this code cache is not prefilled and insertion is done on the first access for every unique ZeDevice what may end up with simulteneous write access and memory corruption Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova@intel.com>
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OCL failure - known failure, expecting intel/llvm-test-suite#944 |
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* sycl: (3343 commits) [SYCL][L0] Disable round-robin submissions to multiple CCSs (intel#5945) [SYCL][CUDA] Don't link pi_cuda against libsycl (intel#5908) [CI] Disable -Werror by default (intel#5889) [BuildBot] Uplift CPU/FPGAEMU RT version to 2022.13.3.0.16 (intel#5883) [SYCL][CUDA][libclc] Add support for atomic fp exchange and compare exchange (intel#5937) [SYCL] Fix device code outlining for static local variables (intel#5915) [SYCL][NFC] Refactor plugin CMakeLists.txt (intel#5799) [SPIR-V][Doc] Add JointMatrixWorkItemLengthINTEL instruction to joint matrix extension (intel#5781) [SYCL] Expand device_global map and make initialization order agnostic (intel#5902) [SYCL][CUDA] Add IPSCCP pass to O0 by default (intel#5900) [ESIMD] Disable ABI changes warnings in host compiler. (intel#5931) [SYCL] Make properties constructor constexpr (intel#5928) [NFC][SYCL] Fix static analysis warning (intel#5933) [CODEOWNERS][NFC] Assign code owners for CI scripts (intel#5873) [SYCL] Store the kernel object size in the integration header (intel#5862) [SYCL][ESIMD] Change esimd-verifier logic for detecting valid SYCL calls (intel#5914) [SYCL][CUDA][DOC] GettingStartedGuide.md to recommend cuda 11.6 (intel#5917) [SYCL][L0] Move command list cache usage under mutex (intel#5874) [SYCL][FPGA] Prepare future implementation of experimental pipe properties (intel#5886) [CI] Roll back intel driver to the latest version (intel#5925) ...
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For the example of usage that may cause issue please refer to assert_in_simulteneous_kernels E2E test. n queues that are working on the same device and on default context will work with the same zeCompute/CopyCommandListCache without protection since mutexes for queues are different while cache is the same.
Operator[] may trigger insertion and rehash so simulteneous access is not thread-safe. In this code cache is not prefilled and insertion is done on the first access for every unique ZeDevice what may end up with simultaneous write access and memory corruption
Signed-off-by: Tikhomirova, Kseniya kseniya.tikhomirova@intel.com