[release/9.0] Add Non-Faulting behaviour for Sve.LoadVector*NonFaulting*() #106768
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Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch |
This was referenced Aug 21, 2024
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@a74nh PTAL, thanks! |
a74nh
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Aug 22, 2024
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Agree with this. The missing FFR tracking means the LoadVector*NonFaulting APIs are not functionally correct.
It will be rare that someone would use FFR and LoadVector*NonFaulting together, however if FFR does get out of sync it will cause bigger issues. So, this does need fixing ASAP.
jeffschwMSFT
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Aug 22, 2024
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approved. we can merge when ready
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Backport of #106648 to release/9.0
/cc @amanasifkhalid @SwapnilGaikwad
Customer Impact
The ARM SVE instruction set has a special SIMD register called the first-faulting register (FFR), where if a vectorized load operation causes a page fault, the lanes in the FFR corresponding to the offending loads are zeroed. For SVE intrinsics with first-faulting semantics, if a load faults, the remaining load operations are skipped, and the corresponding FFR lanes are zeroed. For SVE intrinsics with non-faulting semantics, execution continues in spite of any faults, but the FFR is updated accordingly.
Because these intrinsics implicitly modify the FFR, the JIT has to be judicious in modelling the state of this register. When we initially implemented the first-faulting APIs shipping in .NET 9, we added special cases in lowering and LSRA to track the FFR effects of these intrinsics. However, we did not initially replicate this handling when we added the non-faulting variants of these APIs. This PR fixes that, and also updates our existing non-faulting test suite to verify the FFR is being tracked correctly.
Regression
This PR fixes scenarios specific to SVE, which is newly supported in .NET 9.
Testing
Our existing
Sve.LoadVectorNonFaulting*test suite has been updated to check the FFR's state for correctness.Risk
Low. This fix pertains to SVE support, which is experimental in .NET 9.