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Issue chipsalliance/UHDM#831: Fix compile issues on MinGW#3401

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alaindargelas merged 2 commits intochipsalliance:masterfrom
hs-apotell:Issue#831
Dec 23, 2022
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Issue chipsalliance/UHDM#831: Fix compile issues on MinGW#3401
alaindargelas merged 2 commits intochipsalliance:masterfrom
hs-apotell:Issue#831

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@hs-apotell
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Issue chipsalliance/UHDM#831: Fix compile issues on MinGW

  • Rename "interface" to "interface_inst" to avoid conflicting with system defined class with the same name.
  • Rename "module" to "module_inst" since the latter is now a C++ reserved word as of C++ 20.

PR Includes chipsalliance/UHDM#845

* Rename "interface" to "interface_inst" to avoid conflicing with system
  defined class with the same name.
* Rename "module" to "module_inst" since the latter is now a C++
  reserved word as of C++ 20.
@hs-apotell hs-apotell marked this pull request as draft December 23, 2022 08:32
@hs-apotell hs-apotell marked this pull request as ready for review December 23, 2022 09:52
@hs-apotell
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Yosys plugin failure is a catch-22 problem. The workflow uses the tip from https://github.com/antmicro/yosys-uhdm-plugin-integration but to update that repo it needs to successfully build using the tip from Surelog repo. I don't think this can be fixed without actually merging this PR and then follow up with fixes to the plugin on a separate PR. The edits to fix the issue in the plugin are trivial changes. Please advise if there's an alternative.

@alaindargelas
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No there is no alternative. @rkapuscik to follow up with a fix

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2 participants