Skip to content
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
The table of contents is too big for display.
Diff view
Diff view
  •  
  •  
  •  
6 changes: 3 additions & 3 deletions include/Surelog/Design/Netlist.h
Original file line number Diff line number Diff line change
Expand Up @@ -47,7 +47,7 @@ class Netlist {
InstanceMap;
typedef std::map<std::string, UHDM::BaseClass*, std::less<>> SymbolTable;

std::vector<UHDM::interface*>* interfaces() { return m_interfaces; }
std::vector<UHDM::interface_inst*>* interfaces() { return m_interfaces; }
std::vector<UHDM::interface_array*>* interface_arrays() {
return m_interface_arrays;
}
Expand All @@ -66,7 +66,7 @@ class Netlist {
std::vector<UHDM::process_stmt*>* process_stmts() { return m_process_stmts; }
std::vector<UHDM::param_assign*>* param_assigns() { return m_param_assigns; }

void interfaces(std::vector<UHDM::interface*>* interfaces) {
void interfaces(std::vector<UHDM::interface_inst*>* interfaces) {
m_interfaces = interfaces;
}
void interface_arrays(std::vector<UHDM::interface_array*>* interfaces) {
Expand Down Expand Up @@ -111,7 +111,7 @@ class Netlist {
ModuleInstance* const m_parent;

// members of the netlist
std::vector<UHDM::interface*>* m_interfaces = nullptr;
std::vector<UHDM::interface_inst*>* m_interfaces = nullptr;
std::vector<UHDM::interface_array*>* m_interface_arrays = nullptr;
std::vector<UHDM::net*>* m_nets = nullptr;
std::vector<UHDM::port*>* m_ports = nullptr;
Expand Down
2 changes: 1 addition & 1 deletion include/Surelog/DesignCompile/CompileHelper.h
Original file line number Diff line number Diff line change
Expand Up @@ -563,7 +563,7 @@ class CompileHelper final {
ErrorContainer* m_errors = nullptr;
SymbolTable* m_symbols = nullptr;
ExprBuilder m_exprBuilder;
UHDM::module* m_exprEvalPlaceHolder = nullptr;
UHDM::module_inst* m_exprEvalPlaceHolder = nullptr;
// Caches
UHDM::int_typespec* buildIntTypespec(CompileDesign* compileDesign,
PathId fileId, std::string_view name,
Expand Down
8 changes: 4 additions & 4 deletions include/Surelog/DesignCompile/CompileModule.h
Original file line number Diff line number Diff line change
Expand Up @@ -37,12 +37,12 @@ class SymbolTable;
class ValuedComponentI;

struct FunctorCompileModule {
FunctorCompileModule(CompileDesign* compiler, ModuleDefinition* module,
FunctorCompileModule(CompileDesign* compiler, ModuleDefinition* mdl,
Design* design, SymbolTable* symbols,
ErrorContainer* errors,
ValuedComponentI* instance = nullptr)
: m_compileDesign(compiler),
m_module(module),
m_module(mdl),
m_design(design),
m_symbols(symbols),
m_errors(errors),
Expand All @@ -60,11 +60,11 @@ struct FunctorCompileModule {

class CompileModule final {
public:
CompileModule(CompileDesign* compiler, ModuleDefinition* module,
CompileModule(CompileDesign* compiler, ModuleDefinition* mdl,
Design* design, SymbolTable* symbols, ErrorContainer* errors,
ValuedComponentI* instance = nullptr)
: m_compileDesign(compiler),
m_module(module),
m_module(mdl),
m_design(design),
m_symbols(symbols),
m_errors(errors),
Expand Down
2 changes: 1 addition & 1 deletion include/Surelog/DesignCompile/NetlistElaboration.h
Original file line number Diff line number Diff line change
Expand Up @@ -59,7 +59,7 @@ class NetlistElaboration : public TestbenchElaboration {
bool elab_parameters_(ModuleInstance* instance, bool port_params);
bool elab_interfaces_(ModuleInstance* instance);
bool elab_generates_(ModuleInstance* instance);
UHDM::interface* elab_interface_(
UHDM::interface_inst* elab_interface_(
ModuleInstance* instance, ModuleInstance* interf_instance,
std::string_view instName, std::string_view defName,
ModuleDefinition* mod, PathId fileId, int lineNb,
Expand Down
8 changes: 4 additions & 4 deletions include/Surelog/DesignCompile/UhdmWriter.h
Original file line number Diff line number Diff line change
Expand Up @@ -75,21 +75,21 @@ class UhdmWriter final {
ModPortMap& modPortMap, SignalBaseClassMap& signalBaseMap,
SignalMap& signalMap, ModuleInstance* instance = nullptr,
ModuleDefinition* mod = nullptr);
void writeModule(ModuleDefinition* mod, UHDM::module* m, UHDM::Serializer& s,
void writeModule(ModuleDefinition* mod, UHDM::module_inst* m, UHDM::Serializer& s,
ComponentMap& componentMap, ModPortMap& modPortMap,
ModuleInstance* instance = nullptr);
void writeInterface(ModuleDefinition* mod, UHDM::interface* m,
void writeInterface(ModuleDefinition* mod, UHDM::interface_inst* m,
UHDM::Serializer& s, ComponentMap& componentMap,
ModPortMap& modPortMap,
ModuleInstance* instance = nullptr);
bool writeElabInterface(UHDM::Serializer& s, ModuleInstance* instance,
UHDM::interface* m, ExprBuilder& exprBuilder);
UHDM::interface_inst* m, ExprBuilder& exprBuilder);
void writeInstance(ModuleDefinition* mod, ModuleInstance* instance,
UHDM::any* m, CompileDesign* compileDesign,
ComponentMap& componentMap, ModPortMap& modPortMap,
InstanceMap& instanceMap, ExprBuilder& exprBuilder);
bool writeElabModule(UHDM::Serializer& s, ModuleInstance* instance,
UHDM::module* m, ExprBuilder& exprBuilder);
UHDM::module_inst* m, ExprBuilder& exprBuilder);
bool writeElabProgram(UHDM::Serializer& s, ModuleInstance* instance,
UHDM::program* m);
bool writeElabGenScope(UHDM::Serializer& s, ModuleInstance* instance,
Expand Down
2 changes: 1 addition & 1 deletion src/Common/PlatformFileSystem_test.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -36,7 +36,7 @@
// UHDM
#include <uhdm/ExprEval.h>
#include <uhdm/design.h>
#include <uhdm/module.h>
#include <uhdm/module_inst.h>
#include <uhdm/param_assign.h>
#include <uhdm/vpi_uhdm.h>
#include <uhdm/vpi_user.h>
Expand Down
6 changes: 3 additions & 3 deletions src/DesignCompile/CompileExpression.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -746,7 +746,7 @@ any *CompileHelper::decodeHierPath(hier_path *path, bool &invalidValue,
eval.setGetValueFunctor(getValueFunctor);
eval.setGetTaskFuncFunctor(getTaskFuncFunctor);
if (m_exprEvalPlaceHolder == nullptr) {
m_exprEvalPlaceHolder = compileDesign->getSerializer().MakeModule();
m_exprEvalPlaceHolder = compileDesign->getSerializer().MakeModule_inst();
m_exprEvalPlaceHolder->Param_assigns(
compileDesign->getSerializer().MakeParam_assignVec());
} else {
Expand Down Expand Up @@ -800,7 +800,7 @@ expr *CompileHelper::reduceExpr(any *result, bool &invalidValue,
eval.setGetValueFunctor(getValueFunctor);
eval.setGetTaskFuncFunctor(getTaskFuncFunctor);
if (m_exprEvalPlaceHolder == nullptr) {
m_exprEvalPlaceHolder = compileDesign->getSerializer().MakeModule();
m_exprEvalPlaceHolder = compileDesign->getSerializer().MakeModule_inst();
m_exprEvalPlaceHolder->Param_assigns(
compileDesign->getSerializer().MakeParam_assignVec());
} else {
Expand Down Expand Up @@ -3817,7 +3817,7 @@ uint64_t CompileHelper::Bits(const UHDM::any *typespec, bool &invalidValue,
eval.setGetValueFunctor(getValueFunctor);
eval.setGetTaskFuncFunctor(getTaskFuncFunctor);
if (m_exprEvalPlaceHolder == nullptr) {
m_exprEvalPlaceHolder = compileDesign->getSerializer().MakeModule();
m_exprEvalPlaceHolder = compileDesign->getSerializer().MakeModule_inst();
m_exprEvalPlaceHolder->Param_assigns(
compileDesign->getSerializer().MakeParam_assignVec());
} else {
Expand Down
4 changes: 2 additions & 2 deletions src/DesignCompile/CompileHelper.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3208,7 +3208,7 @@ UHDM::any* CompileHelper::compileTfCall(DesignComponent* component,
VectorOfany* arguments =
compileTfCallArguments(component, fC, argListNode, compileDesign,
call, nullptr, false, false);
module* modTmp = s.MakeModule();
module_inst* modTmp = s.MakeModule_inst();
modTmp->VpiName("tmp");
const VectorOfseq_formal_decl* decls = stmt->Ios();
VectorOfparam_assign* passigns = s.MakeParam_assignVec();
Expand Down Expand Up @@ -3237,7 +3237,7 @@ UHDM::any* CompileHelper::compileTfCall(DesignComponent* component,

ElaboratorListener* listener = new ElaboratorListener(&s, false);
vpiHandle defModule = NewVpiHandle(modTmp);
listener->listenModule(defModule);
listener->listenModule_inst(defModule);
vpi_free_object(defModule);
delete listener;
return (any*)cts->Rhs();
Expand Down
4 changes: 2 additions & 2 deletions src/DesignCompile/CompileStmt.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2824,8 +2824,8 @@ UHDM::any* CompileHelper::bindVariable(DesignComponent* component,
}
break;
}
case uhdmmodule: {
module* mod = (module*)scope;
case uhdmmodule_inst: {
module_inst* mod = (module_inst*)scope;
if (mod->Variables()) {
for (auto var : *mod->Variables()) {
if (var->VpiName() == name) return var;
Expand Down
2 changes: 1 addition & 1 deletion src/DesignCompile/Elaboration_test.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -37,7 +37,7 @@
#include <uhdm/gen_scope.h>
#include <uhdm/gen_scope_array.h>
#include <uhdm/int_typespec.h>
#include <uhdm/module.h>
#include <uhdm/module_inst.h>
#include <uhdm/param_assign.h>
#include <uhdm/variables.h>
#include <uhdm/vpi_user.h>
Expand Down
2 changes: 1 addition & 1 deletion src/DesignCompile/EvalFunc.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -68,7 +68,7 @@ expr* CompileHelper::EvalFunc(UHDM::function* func, std::vector<any*>* args,
eval.setGetValueFunctor(getValueFunctor);
eval.setGetTaskFuncFunctor(getTaskFuncFunctor);
if (m_exprEvalPlaceHolder == nullptr) {
m_exprEvalPlaceHolder = compileDesign->getSerializer().MakeModule();
m_exprEvalPlaceHolder = compileDesign->getSerializer().MakeModule_inst();
m_exprEvalPlaceHolder->Param_assigns(
compileDesign->getSerializer().MakeParam_assignVec());
} else {
Expand Down
26 changes: 13 additions & 13 deletions src/DesignCompile/NetlistElaboration.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1248,7 +1248,7 @@ bool NetlistElaboration::high_conn_(ModuleInstance* instance) {
ref->Actual_group(mp);
p->Low_conn(ref);
}
} else if (net && (net->UhdmType() == uhdminterface) &&
} else if (net && (net->UhdmType() == uhdminterface_inst) &&
(lowconn_is_nettype)) {
BaseClass* sm = nullptr;
if (orderedConnection) {
Expand Down Expand Up @@ -1386,7 +1386,7 @@ bool NetlistElaboration::high_conn_(ModuleInstance* instance) {
return true;
}

interface* NetlistElaboration::elab_interface_(
interface_inst* NetlistElaboration::elab_interface_(
ModuleInstance* instance, ModuleInstance* interf_instance,
std::string_view instName, std::string_view defName, ModuleDefinition* mod,
PathId fileId, int lineNb, interface_array* interf_array,
Expand All @@ -1398,12 +1398,12 @@ interface* NetlistElaboration::elab_interface_(
instance->setNetlist(netlist);
}
Serializer& s = m_compileDesign->getSerializer();
VectorOfinterface* subInterfaces = netlist->interfaces();
VectorOfinterface_inst* subInterfaces = netlist->interfaces();
if (subInterfaces == nullptr) {
subInterfaces = s.MakeInterfaceVec();
subInterfaces = s.MakeInterface_instVec();
netlist->interfaces(subInterfaces);
}
interface* sm = s.MakeInterface();
interface_inst* sm = s.MakeInterface_inst();
sm->VpiName(instName);
sm->VpiDefName(defName);
// sm->VpiFullName(??);
Expand Down Expand Up @@ -1434,7 +1434,7 @@ interface* NetlistElaboration::elab_interface_(
StrCat(instName, ".", orig_modport.first);
if (!modPortName.empty() && (modportfullname != modPortName)) continue;
modport* dest_modport = s.MakeModport();
dest_modport->Interface(sm);
dest_modport->Interface_inst(sm);
dest_modport->VpiParent(sm);
const FileContent* orig_fC = orig_modport.second.getFileContent();
const NodeId orig_nodeId = orig_modport.second.getNodeId();
Expand All @@ -1457,7 +1457,7 @@ interface* NetlistElaboration::elab_interface_(
if (net == nullptr) {
net = bind_net_(instance, sigName);
}
if (net && (net->UhdmType() == uhdminterface)) {
if (net && (net->UhdmType() == uhdminterface_inst)) {
ref_obj* n = s.MakeRef_obj();
n->VpiName(sigName);
n->VpiFullName(StrCat(instance->getFullPathName(), ".", sigName));
Expand Down Expand Up @@ -2328,7 +2328,7 @@ bool NetlistElaboration::elab_ports_nets_(
ref->Actual_group(array_int);
}

interface* sm = elab_interface_(
interface_inst* sm = elab_interface_(
instance, interfaceInstance, signame, orig_interf->getName(),
orig_interf, instance->getFileId(), instance->getLineNb(),
array_int, "");
Expand All @@ -2339,7 +2339,7 @@ bool NetlistElaboration::elab_ports_nets_(

auto interfs = netlist->interfaces();
if (interfs == nullptr) {
netlist->interfaces(s.MakeInterfaceVec());
netlist->interfaces(s.MakeInterface_instVec());
interfs = netlist->interfaces();
}
interfs->push_back(sm);
Expand Down Expand Up @@ -2537,20 +2537,20 @@ any* NetlistElaboration::bind_net_(ModuleInstance* instance,
BaseClass* baseclass = (*itr).second;
port* conn = any_cast<port*>(baseclass);
ref_obj* ref1 = nullptr;
const interface* interf = nullptr;
const interface_inst* interf = nullptr;
if (conn) {
ref1 = any_cast<ref_obj*>((BaseClass*)conn->Low_conn());
}
if (ref1) {
interf = any_cast<interface*>((BaseClass*)ref1->Actual_group());
interf = any_cast<interface_inst*>((BaseClass*)ref1->Actual_group());
}
if (interf == nullptr) {
interf = any_cast<interface*>(baseclass);
interf = any_cast<interface_inst*>(baseclass);
}
if ((interf == nullptr) && ref1) {
modport* mport = any_cast<modport*>((BaseClass*)ref1->Actual_group());
if (mport) {
interf = mport->Interface();
interf = mport->Interface_inst();
}
}
if (interf) {
Expand Down
Loading