CI: Skip UCCL nixlbench tests - #2000
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Signed-off-by: Ovidiu Mara <ovidium@nvidia.com>
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📝 WalkthroughWalkthroughThe GPU-conditional UCCL nixlbench transfer tests using etcd are disabled with explanatory TODO comments. Other UCX tests and etcd server lifecycle handling remain unchanged. Changesnixlbench CI coverage
Estimated code review effort: 1 (Trivial) | ~2 minutes Suggested reviewers: 🚥 Pre-merge checks | ✅ 5✅ Passed checks (5 passed)
✨ Finishing Touches🧪 Generate unit tests (beta)
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🤖 CI Triage Agent — TL;DR: The ucx-v1.22.x "Run CPP tests" stage was SIGTERM-killed (exit 143) after the gtest suite blew past its wall-clock budget; the root cause is a severe performance regression in the Full analysisSummary: Root cause: Not a wall-clock shortfall — a per-test regression. Comparing durations in the same gtest run: Implicated commit: File: Suggested fix: Do not raise the CI time limit. Bisect/verify against #1906: confirm the progress thread is actually created and running for the threadpool engine and that it progresses the shared workers used by threadpool transfers. Compare Related: PR #1906 (implicated refactor); PR #1880, #1846 (secondary threadpool/EP-lifecycle candidates). No existing issue found for this specific slowdown. |
## What? Skip UCCL nixlbench test due to frequent issues on teardown Follow up for #2000 ## Why? See #1999 Summary from triage agent: The UCCL backend crashes on teardown (the benchmark row printed and both processes logged "Destroying Engine…/Engine destroyed", then task 0 segfaulted — a race/crash in UCCL engine cleanup, not a hang or timeout). This is the known-flaky UCCL nixlbench issue #1999. Commit #2000 attempted to mitigate it but only commented out the ETCD-based UCCL loop (test_nixlbench.sh lines 122-132); the ASIO-based UCCL loop (lines 95-103) remained active and is what ran and crashed. The pairwise ucx-v1.22.x variant (stage 351) passed, confirming the failure is a nondeterministic UCCL crash. (The extensive pin_thread_to_numa/selectNICs ERROR/WARN lines are benign noise from the CI node's NUMA topology, not the cause.) <!-- This is an auto-generated comment: release notes by coderabbit.ai --> ## Summary by CodeRabbit * **Tests** * Disabled the GPU-gated UCCL ASIO transfer benchmark tests due to CI flakiness. * Added a follow-up reference to track re-enabling the tests. <!-- end of auto-generated comment: release notes by coderabbit.ai --> Signed-off-by: Ovidiu Mara <ovidium@nvidia.com>
What?
Skip UCCL nixlbench test due to frequent hangs, see #1999
Summary by CodeRabbit