[geotseng-amd]

AIHPBLAS-4768

gfx1250-strict as an architecture of its own, plus a gfx1250v0 subtree for v0 parts that report gfx1250

Follow-up to #10784, which
introduced gfx1250-strict as an ordinary architecture name. This PR removes the
special cases #10784 left in CMake. It also retires develop's gfx1250v0
ASIC-revision workaround in favour of the stepping's own name, and keeps v0
silicon correct while ROCr still reports it as gfx1250 by default.

Motivation

gfx1250 ships as two silicon steppings. They share the ISA tuple (12, 5, 0) but
are separate compiler targets (ELF EF_AMDGPU_MACH 0x49 for gfx1250/v1, 0xEB
for gfx1250-strict/v0). A code object built for one is rejected on the other.

On ROCm 10.2, what a v0 part reports depends on HSA_DISABLE_GFX12_STRICT:

HSA_DISABLE_GFX12_STRICT	gcnArchName on v0	code objects that load	asicRevision
0	gfx1250-strict	0xEB only	0
1 or unset	gfx1250	0x49 only	0

In the second row, v0 would otherwise load v1 kernels. Those use instructions v0
does not have, such as v_wmma_scale_f32_32x16x128_f4, and TDM multicast.
Measured on v0: an FP4 v1 kernel returns norm_error=nan. That row is ROCr's
default today, so it has to stay correct until the default flips.

Tensile keys its capability map by ISA, so one TensileCreateLibrary run
cannot describe both steppings. #10784 worked around that in CMake: a second
hipblaslt_create_device_library call for gfx1250-strict, plus an extra install
rule driven by a global property. This PR moves the split into
TensileCreateLibrary, where the knowledge of which names collide already
lives. CMake goes back to a single call with ${GPU_TARGETS}.

The ISA-keyed machinery itself is deliberately left alone. Re-keying it by name
would touch ~88 isaInfoMap[...] subscripts across 24 files, plus two rocisa
C++ sites and the nanobind ABI, on every architecture's code path.

What gets built and loaded

Subtree	Contents	Compiler target / ELF	File-name token	Built by
library/gfx1250/	v1 tuning	gfx1250 / 0x49	gfx1250	-a gfx1250
library/gfx1250v0/	v0: gfx1250-strict logic and capability overrides	gfx1250 / 0x49	gfx1250	-a gfx1250 (default, HIPBLASLT_BUILD_GFX1250V0=ON)
library/gfx1250-strict/	v0	gfx1250-strict / 0xEB	gfx1250-strict	-a gfx1250-strict

The runtime picks the Tensile GEMM subtree from the reported name first, then
the revision. This applies to both hipBLASLt and hipSPARSELt, when
*_TENSILE_LIBPATH is unset:

Reported gcnArchName	asicRevision	Subtree
gfx1250-strict	not read	gfx1250-strict/ (unchanged)
gfx1250	0 (v0)	gfx1250v0/. If it is missing, hard error: no fallback to gfx1250/, whose kernels are wrong on v0
gfx1250	non-zero (v1)	gfx1250/ (unchanged)
anything else	not read	<name>/ (unchanged)

Technical Details

Fan-out

isaCollisionFreeGroups() partitions the requested names so that no group holds
two names spelling one ISA. A run handed more than one group re-executes itself
once per group as a subprocess. They are separate processes rather than a loop,
because a run settles arch-dependent state process-wide.

A single group takes the old path untouched: no subprocess, and no change to
parallelism, scratch naming or cleanup. That covers every build that names no
gfx1250 variant. Jobs are split by architecture count rather than evenly.

Scratch directories

Kernel basenames come from the ISA, so both steppings name their .s and .o
files identically. The fixed-name artifacts (Kernels.cpp, Kernels.h, the six
static headers, code_object_tmp/Kernels.o) carry no architecture at all.

Scratch is therefore build_tmp/<STEM>-<stepping> for a run asked for a
stepping, and stays build_tmp/<STEM> otherwise. Fan-out children carry
TENSILE_GROUP_BUILD, so each reclaims only its own subdirectory.

Benchmark cache key (correctness fix)

The tuning cache key gains the compiler targets; otherwise the second stepping
would load the first stepping's code objects. _loadLegacyCacheIfMatches is
removed, because it is keyed by directory alone and would bypass the new field.

Architecture names

• Tuning is selected by ArchitectureName, which a stepping spells as itself.
  archMatch() compares whole names, so gfx1250 cannot claim a
  gfx1250-strict request, and it strips both qualifiers and bracketed
  predicates, so gfx950[cu=64] still matches its own logic.
• steppingArchOf() derives a stepping rather than looking it up in a table: a
  name is a stepping exactly when it does not survive a round trip through its
  ISA. A future stepping needs no registration.
• Detection keeps the stepping. The answer from amdgpu-arch, or from the
  enumerator, goes through restore_steppings, so a bare Tensile run on v0
  builds gfx1250-strict rather than base gfx1250. Colon target features are
  stripped for --gpu-targets; the hyphenated stepping is kept.
• A stepping inherits no marks from its base. Configs that must stay off
  gfx1250 silicon list both skip-gfx1250 and skip-gfx1250-strict.

gfx1250v0: v0 kernels for a runtime that reports gfx1250

gfx1250v0 is a build-only alias. It is never in GPU_TARGETS (CMake's
supported list rejects it), never a runtime name, and excluded from all and
archMacroNames. Naming it directly is rejected, both by
TensileCreateLibrary --architecture (before any code generation) and by
Tensile --gpu-targets / a config's Architecture. A single declarative table,
ARCH_BUILD_ALIASES in Common/Architectures.py, defines it:

Field	Value	Used by
tuningArch	gfx1250-strict	Logic selection (archMatch), ARCH_CAP_OVERRIDES in Capabilities.applyArchCapOverrides, StinkyTofuArchName
target	gfx1250	Assembler -mcpu and .amdgcn_target, bundle target id, helper --offload-arch, the declared ArchitectureName after parsing (LibraryIO archRenames), master/Mapping/.co names
deviceTargetFeatures	+needs-aligned-2addr-lds, -wmma-f4-insts, -block16-cvt-scale-insts	The assembler (-Xclangas) and the HIP helper compile (-Xclang)

• Codegen divergence. gfx1250v0 goes through exactly gfx1250-strict's
  Tensile codegen: same logic, same capability overrides (no TDM multicast, no
  fp4 32x16 WMMA), same StinkyTofuArchName. Only the compiler target, file
  names and output directory differ. The added target features make the
  assembler reject the instructions v0 lacks, as it does for gfx1250-strict, and
  give the helper kernels strict's ISA.
• Expansion. With --gfx1250v0, withArchBuildAliases() appends
  gfx1250v0 when bare gfx1250 is requested, including through all. It runs
  before isaCollisionFreeGroups and never in a fan-out child, so
  -a "gfx1250;gfx1250-strict" builds three groups. gfx1250-strict alone does
  not expand. If no gfx1250-strict logic matches (a filtered or custom logic
  build), the alias is skipped with a warning rather than producing an empty
  subtree.
• Knobs. TensileCreateLibrary --gfx1250v0 is opt-in, so direct callers
  (tox, the benchmark client, GenerateSummations) are unchanged. The CMake option
  HIPBLASLT_BUILD_GFX1250V0 (default ON, in hipblaslt_codegen.cmake, so
  hipSPARSELt shares it) passes the flag, and adds gfx1250-strict to the
  TensileLogic --check-all architectures of a gfx1250 build. Turning v0 off for
  gfx1250 once TheRock builds gfx1250-strict is -DHIPBLASLT_BUILD_GFX1250V0=OFF.
• Output. Files carry the gfx1250 token and land in library/gfx1250v0/. It
  holds no ExtOp or Transform files; those load from library/<gcnArchName>/
  as before. validate_library_layout.py gains
  REVISION_SUBTREES = {"gfx1250v0": "gfx1250"}.

Runtime selection

• hipBLASLt. tensile_host.cpp reads asicRevision only for a device
  reporting gfx1250, and asks the pure helper
  rocblaslt_revisioned_arch_name(processor, asicRevision) for the subdirectory
  (restored from develop as rocblaslt_arch_revision.hpp). Master file names,
  codeObjectTargets and lazy loading keep using the reported name, so files
  named gfx1250 inside gfx1250v0/ resolve unchanged.
  • A missing v0 library (lazy or non-lazy master) prints an error naming the
    directory and the two ways out. Loading then fails through the existing
    error paths, and API calls return an error status.
  • row_uniformity_gtest's library helper uses the same helper.
• hipSPARSELt. The same rule and the same hard error in its tensile_host.cpp
  (asicRevision read only for gfx1250, guarded by HIP_VERSION >= 307 as in
  its handle.cpp).

Removed knobs

HIPBLASLT_ASIC_REVISION, --asic-revision, gpu_revision_probe,
GpuRevisionTarget.py, and the gfx1250v0 overlay checks
(find_gfx1250v0_overlay_violations, --require-gfx1250v0-overlay) are
removed. The stepping is named in GPU_TARGETS, and the gfx1250 v0 subtree is
controlled by HIPBLASLT_BUILD_GFX1250V0.

Tuning logic

Logic/asm_full/gfx1250v0/ moves to gfx1250-strict/ (226 files; directory,
filename prefix, ScheduleName and ArchitectureName renamed, tuning values
unchanged). hipSPARSELt gains its own gfx1250-strict spmm tree (64 files).

Guards, packaging, reproducibility

• Source guards. Compiling for gfx1250-strict predefines __gfx1250_strict__
  and not __gfx1250__. Eight guards (memory_gfx.h, the float4/bfloat6/
  float6/e5m3 headers, DataTypes_E5M3.hpp, mxDataGenerator) accept both, and
  the extops/matrix-transform CMake arch regexes keep -strict.
• Assembler retarget. _retargetAssemblySource matches the whole hyphenated
  processor name, so gfx1250-strict is not rewritten to
  gfx1250-strict-strict.
• Packaging checks. validate_library_layout.py and check_dat_integrity.py
  accept hyphens in an architecture token.
• Reproducibility. Logic files are merged in sorted order.
• Test isolation. test_MatrixInstructionConversion updated the shared
  defaultSolution in place, which leaked into whichever test xdist ran next
  on that worker; it now works on a copy.

Test Plan

The full procedure is in projects/hipblaslt/docs/gfx1250-strict-testing.md
(Suite 6 covers gfx1250v0). It runs on a real v0 machine with the newest ROCm
nightly, through pipeline-v0.sh.

1. TensileLite unit tests. pytest -m unit over Tests/unit and
   Tests/extras.

2. Architecture-name parsing (test_arch_steppings.py). Every
   architectureMap name in every CMake spelling (bare, :xnack±, [cu=64],
   [id=74a0]) must match its own logic header and no other. Also covers the
   gfx1250v0 alias table, expansion (with / without --gfx1250v0, fan-out
   child), rejection of the alias as a requested name, the three-group
   partition, caps equality with strict end to end through KernelWriter,
   compiler target and features, logic selection and keying, and the
   no-strict-logic skip.

3. Parser diff against the base commit for 121 spellings.

4. Packaging script tests (tools/scripts/tests/), including the v0
   subtree.

5. pre-commit. Both the hipBLASLt config and the repo root config.

6. stinkytofu ctest.

7. Build ./install.sh -c -a "gfx1250;gfx1250-strict", then verify_v0.py on
   the install tree:

   • ELF per subtree (0x49 / 0x49 / 0xEB);
   • file-name tokens;
   • no fp4 32x16 WMMA, v_cvt_scale_pk*, multicast or helper ds_*_2addr in
     either v0 tree, while gfx1250/ does have them, so the scan is not
     vacuous;
   • the kernel set of gfx1250v0/ equals that of gfx1250-strict/.

   Plus validate_library_layout.py.

8. hipblaslt-test, all and *quick*, in both reporting modes. Each run
   checks that ldd resolves to the built libhipblaslt.so, and that the log
   shows the subtree loaded: HSA_DISABLE_GFX12_STRICT=0 → gfx1250-strict/,
   =1 → gfx1250v0/, unset → gfx1250v0/.

9. FP4 regression. hipblaslt-bench FP4 TN 256x256x512 with MX scales
   (--requested_solution -1 -v) and the smoke_matmul_gemm_tn_mxf4 test, in
   both modes: every solution must pass. Negative control: forcing
   HIPBLASLT_TENSILE_LIBPATH at library/gfx1250/ on v0 must bring the NaN
   back.

10. No fallback. In a copy of the install without gfx1250v0/, a v0
    reporting gfx1250 must fail with the error, and no test may pass.

11. tox config tests (Tests/common), in strict mode.

12. hipSPARSELt. Build -a "gfx1250;gfx1250-strict", run verify_v0.py on its
    library tree, check no-fallback, confirm with strace which subtree each
    mode opens, then run the full hipsparselt-test in both modes (one GPU
    each), with an ldd check.

Test Result

Committed series (without gfx1250v0)

Measured on the series at bdb85d2f61 (develop 670b375ba0) with the fixes
since committed as 8f11772cbb. ROCm 10.2.0a20260926, HSA_DISABLE_GFX12_STRICT=0,
4× gfx1250 v0.

Check	Result
TensileLite unit (-m unit)	9083 passed, 0 failed
test_arch_steppings.py	787 passed
Packaging script tests	15 passed
pre-commit, hipBLASLt config (full unit)	9084 passed, both hooks Passed
pre-commit, repo root config	Passed
stinkytofu ctest	1573 / 1573
Build, both architectures	rc=0, 400 files each
ELF machine flag	0x49 (gfx1250), 0xEB (gfx1250-strict)
validate_library_layout.py	OK
hipblaslt-test, all (gfx1250-strict)	67515 passed, 0 failed, 17 skipped
hipblaslt-test *quick* (gfx1250-strict)	18043 passed, 0 failed
tox Tests/common	8783 passed, 0 failed
hipsparselt-test (gfx1250-strict)	165405 passed, 0 failed

With gfx1250v0

This change as staged on 8f11772cbb (develop d0e4bc5f98), since committed as
1c366475cc. The commit is identical file-for-file except
spmm_f16_sia4.yaml, which is re-validated on its own below.
ROCm 10.2.0a20260929, 4× gfx1250 v0, every GPU step on GPUs 2 and 3.

Tensile and build

Check	Result
TensileLite unit (-m unit -n 8)	9348 passed, 0 failed
test_arch_steppings.py	828 passed
Packaging script tests	18 passed
pre-commit, hipBLASLt config (staged diff)	9348 passed, both hooks Passed
pre-commit, repo root config	Passed
stinkytofu ctest	1579 / 1579
Build -a "gfx1250;gfx1250-strict"	rc=0, 3 groups [gfx1250], [gfx1250-strict], [gfx1250v0]
Files gfx1250 / v0 / strict	400 / 397 / 400 (v0 has no ExtOp / Transform)
ELF gfx1250 / v0 / strict	0x49 / 0x49 / 0xEB
fp4 32x16 WMMA, gfx1250 / v0 / strict	896 / 0 / 0
multicast setup, gfx1250 / v0 / strict	45 / 0 / 0
helper ds_*_2addr, gfx1250 / v0 / strict	78 / 0 / 0
Kernel set v0 vs strict	2840 = 2840, none unique to either
v0 vs strict code (smoke, 7 logic pairs)	identical apart from .amdgcn_target
v0 assembler (-mcpu=gfx1250 + v0 features)	rejects v_wmma_f32_32x16x128_f4 and v_cvt_scale_pk8_f32_fp4, as -mcpu=gfx1250-strict does; plain gfx1250 accepts both
validate_library_layout.py	OK

hipBLASLt runtime

Check	Result
ldd hipblaslt-test	the built libhipblaslt.so.1 and libtensilelite-host.so.1
Subtree loaded, =0 / =1 / unset (log)	gfx1250-strict/ / gfx1250v0/ / gfx1250v0/
Subtree opened, =0 / =1 (strace -e openat)	only gfx1250-strict/ / only gfx1250v0/
hipblaslt-test all, =0 (gfx1250-strict)	67545 passed, 0 failed, 17 skipped
hipblaslt-test *quick*, =0	18043 passed, 0 failed
hipblaslt-test all, =1 (gfx1250v0)	67540 passed, 1 failed, 21 skipped (nightly_matmul_deepbench_bf16_..._NN_1152_128_7000_..._3_t2, intermittent; 20 / 20 reruns passed, see Known)
hipblaslt-test *quick*, =1	18043 passed, 0 failed
FP4 bench, =0 / =1	345 / 345 and 345 / 345, no nan; smoke passed in both
FP4 negative control (v1 tree forced, =1)	1 solution wrong (nan), as expected
No fallback (v0 removed, =1)	error naming library/gfx1250v0; 0 passed, 128 failed; exit 1

TensileLite config tests and hipSPARSELt

Check	Result
tox Tests/common (=0)	9050 passed, 0 failed, 1439 skipped, 2 xfailed
spmm_f16_sia4.yaml as committed (=0)	100 / 100 solutions passed, including the first group's DepthU 128 / PLR 1 / SIA 3
hipSPARSELt build -a "gfx1250;gfx1250-strict"	rc=0; 131 files in each of gfx1250/, gfx1250v0/, gfx1250-strict/
hipSPARSELt ELF gfx1250 / v0 / strict	0x49 / 0x49 / 0xEB; fp4 32x16 WMMA and multicast 0 in all three
hipSPARSELt kernel set v0 vs strict	64 = 64, none unique to either
hipSPARSELt subtree opened, =0 / =1 (strace)	only gfx1250-strict/ / only gfx1250v0/
hipSPARSELt no fallback (v0 removed, =1)	error naming library/gfx1250v0; every spmm test fails (status 10, no solutions); prune/compress, which do not use the GEMM library, pass (2448); run capped at 300 s
hipsparselt-test, =0 (GPU 2, gfx1250-strict)	165405 passed, 0 failed
hipsparselt-test, =1 (GPU 3, gfx1250 → gfx1250v0)	165405 passed, 0 failed

Before this change, the FP4 bench on v0 in =1 mode loaded library/gfx1250/
and gave 344 / 345 passes, with the MI32x16 kernel returning norm_error=nan.

Deliberate behaviour changes

1. gfx1250 builds produce a third subtree. Any CMake build naming gfx1250
   (including all) builds library/gfx1250v0/ in an extra fan-out group,
   which roughly doubles gfx1250's Tensile build time and library size.
   -DHIPBLASLT_BUILD_GFX1250V0=OFF removes it.
2. v0 reporting gfx1250 now loads gfx1250v0/, or fails. Previously it
   silently ran v1 kernels. A package without the v0 subtree now fails on v0
   with HSA_DISABLE_GFX12_STRICT unset or 1; use =0 with a gfx1250-strict
   build instead.
3. Benchmark cache keys change for every architecture (the architecture is
   folded into the hash), so existing tuning output directories miss once.
4. Shipped .dat bytes change for every architecture (deterministic logic
   merge order changes solution indices).
5. The linker response file moves to <destPath>.linker_args.
6. Kernels.cpp, Kernels.h and the static headers are written under the
   run's scratch directory rather than the output root.
7. _loadLegacyCacheIfMatches is removed.

Known, not addressed

• Mixed v0 and v1 in one process. The library is loaded once, from the first
  device to initialize.
• Other kernels on v0 in non-strict mode. ExtOps, matrix-transform and the
  HIP kernels compiled into libhipblaslt / libhipsparselt load their gfx1250
  (v1) builds, as on develop. hipblaslt-test and hipsparselt-test in =1 mode
  exercise them.
• v1's asicRevision. It is assumed non-zero; there was no v1 machine to
  confirm it.
• *_TENSILE_LIBPATH is used verbatim. Pointing it at library/gfx1250/ on
  v0 still loads v1 kernels, and a mismatched install is not validated.
• Predicated gfx1250 targets. A gfx1250[cu=…] entry in GPU_TARGETS builds
  gfx1250v0 without its predicate, and does not add gfx1250-strict to the
  TensileLogic --check-all list.
• Helper-kernel cache. The key is the arch name, not the device target
  features. Clear ~/.tensile/helper_cache if those change.
• Stale v0 subtree. Turning HIPBLASLT_BUILD_GFX1250V0 off in an existing
  build directory leaves the old library/gfx1250v0/ to be installed.
• Workflow. .github/workflows/gfx1250_hipblaslt_tensilelite_test.yml still
  sets TL_TARGET=gfx1250v0, a name Tensile now rejects as a target; it needs
  porting to gfx1250-strict.
• Intermittent bf16 result on v0.
  nightly_matmul_deepbench_bf16_..._NN_1152_128_7000_..._3 returned a wrong
  value once in a full strict-mode run before this change (40 / 40 reruns
  passed). Its _t2 variant did the same once in a full gfx1250v0-mode run
  after it (20 / 20 reruns passed).
• Sparse codegen bug. On gfx1250-strict, PrefetchLocalRead=1 with
  DepthU=128, ScheduleIterAlg=4 and buffer_load sparse A returns wrong
  values. spmm_f16_sia4.yaml's first group now uses ScheduleIterAlg=3,
  keeping DepthU 128 and PLR 1, which passes. The SIA 4 combination and the base
  gfx1250 twin config are unverified.
• isaInfoMap annotation. It is Dict[str, IsaInfo] while production keys
  it by IsaVersion.
• Makefile:55 gates TRUE16_FEATURE on an unset TARGET_ARCH, so
  make co never passes +real-true16. This predates the branch.

Submission Checklist

• Look over the contributing guidelines at https://github.com/ROCm/ROCm/blob/develop/CONTRIBUTING.md#pull-requests.

JIRA ID : AIHPBLAS-4727
JIRA ID : AIHPBLAS-4728
JIRA ID : AIHPBLAS-4729
JIRA ID : AIHPBLAS-4730
JIRA ID : AIHPBLAS-4768
JIRA ID : AIHPSPAR-275
JIRA ID : ROCM-31226
JIRA ID : ROCM-30511

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Codecov Report

❌ Patch coverage is 83.17972% with 73 lines in your changes missing coverage. Please review.

Files with missing lines	Patch %	Lines
...rary/src/amd_detail/rocblaslt/src/tensile_host.cpp	19.05%	28 Missing and 6 partials ⚠️
...blaslt/tensilelite/Tensile/Common/Architectures.py	89.92%	7 Missing and 5 partials ⚠️
...lt/tensilelite/Tensile/TensileCreateLibrary/Run.py	94.66%	6 Missing and 1 partial ⚠️
...ipblaslt/tensilelite/Tensile/GenerateSummations.py	33.33%	6 Missing ⚠️
projects/hipblaslt/tensilelite/Tensile/GpuArch.py	92.77%	4 Missing and 2 partials ⚠️
...ects/hipblaslt/tensilelite/Tensile/ClientWriter.py	50.00%	4 Missing ⚠️
projects/hipblaslt/tensilelite/Tensile/Tensile.py	85.71%	1 Missing and 1 partial ⚠️
...hipblaslt/tensilelite/Tensile/BenchmarkProblems.py	88.89%	1 Missing ⚠️
...aslt/tensilelite/Tensile/KernelWriterConversion.py	75.00%	0 Missing and 1 partial ⚠️

Additional details and impacted files

@@             Coverage Diff             @@
##           develop   #11777      +/-   ##
===========================================
+ Coverage    70.66%   70.67%   +0.01%     
===========================================
  Files         2939     2939              
  Lines       483878   483977      +99     
  Branches     69775    69781       +6     
===========================================
+ Hits        341889   342014     +125     
+ Misses      118127   118106      -21     
+ Partials     23862    23857       -5     

Flag	Coverage Δ		*Carryforward flag
TensileLite-CPP	48.82% <ø> (ø)
TensileLite-Unit	82.64% <90.05%> (+0.06%)	⬆️
hipBLAS	90.62% <ø> (ø)		Carriedforward from d4f4ad1
hipBLASLt	35.59% <19.05%> (ø)		Carriedforward from d4f4ad1
hipCUB	82.68% <ø> (ø)		Carriedforward from d4f4ad1
hipDNN	86.71% <ø> (ø)		Carriedforward from d4f4ad1
hipFFT	54.32% <ø> (ø)		Carriedforward from d4f4ad1
hipRAND	76.12% <ø> (ø)		Carriedforward from d4f4ad1
hipSOLVER	68.96% <ø> (ø)		Carriedforward from d4f4ad1
hipSPARSE	86.99% <ø> (ø)		Carriedforward from d4f4ad1
rocBLAS	48.25% <ø> (ø)		Carriedforward from d4f4ad1
rocFFT	47.11% <ø> (ø)		Carriedforward from d4f4ad1
rocRAND	57.42% <ø> (ø)		Carriedforward from d4f4ad1
rocSOLVER	76.83% <ø> (ø)		Carriedforward from d4f4ad1
rocSPARSE	74.75% <ø> (ø)		Carriedforward from d4f4ad1
rocThrust	78.45% <ø> (ø)		Carriedforward from d4f4ad1

*This pull request uses carry forward flags. Click here to find out more.

Files with missing lines	Coverage Δ
...aslt/library/include/hipblaslt/hipblaslt_bfloat6.h	0.00% <ø> (ø)
...pblaslt/library/include/hipblaslt/hipblaslt_e5m3.h	0.00% <ø> (ø)
...laslt/library/include/hipblaslt/hipblaslt_float4.h	0.00% <ø> (ø)
...laslt/library/include/hipblaslt/hipblaslt_float6.h	0.00% <ø> (ø)
.../rocblaslt/src/include/rocblaslt_arch_revision.hpp	60.00% <ø> (ø)
...c/amd_detail/rocblaslt/src/rocblaslt_auxiliary.cpp	68.38% <ø> (ø)
...pblaslt/tensilelite/Tensile/Common/Capabilities.py	100.00% <100.00%> (ø)
...slt/tensilelite/Tensile/Common/GlobalParameters.py	95.82% <ø> (ø)
.../hipblaslt/tensilelite/Tensile/CustomYamlLoader.py	96.40% <100.00%> (ø)
projects/hipblaslt/tensilelite/Tensile/Hardware.py	96.71% <ø> (ø)
... and 17 more

... and 6 files with indirect coverage changes

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[hcman2]

OK if test passed

[pmoutsias-amd]

I checked the edit in the readme and it is a straight removal. LGTM.

[bnemanich]

mxdatagenerator change looks fine. Will need someone else to look over the rest of PR.

[jichangjichang]

FFM gfx1250 failed is caused by another merged PR.
All other failed CIs are not related to our PR.
Math CI get Pass.

[assistant-librarian]

TheRock Submodule Bump Activity

Newest first

• 2026-10-05 — Included in TheRock via ROCm/TheRock#8658.