chore(compiler) : set submodule pointer for Compiler ww43-1.4 by ronlieb · Pull Request #9673 · ROCm/TheRock

ronlieb · 2026-11-01T22:45:58Z

Bump in llvm content for ww43
Oct 14->Oct 22

llvm 9fd578133aef
spirv ff3483af
hipify d364ef40

LCOMPILER-2866 9fd578133aef [offload] gfx1250-strict miscomputes waveSize (#5201)
LCOMPILER-2986 3696d0a890f3 Revert "[IR] Add alias scope domains with disjoint scopes (#218768)"
LCOMPILER-2886 4b73beafc162 [AMDGPU] vcc_hi has no DWARF register number
LCOMPILER-2972 d9f5fb07050d Revert "[NFC][HIP][SPIRV] Rework -spirv-preserve-auxdata handling. (#227875)"
LCOMPILER-2727 fe993e2c54f3 Revert "Re-apply "[PromoteMemToReg] Insert store undef when removing lifetime markers" (#218935)"
LCOMPILER-2866 673789cc0b25 [runtime unroll] disable runtime unroll
LCOMPILER-3061 3b0375b65a7e Revert "[SLP] Restore amd-staging default -slp-vectorize-once-used=false (#4976)" (#5049)

WW42-2.3 carry forward
LCOMPILER-2886 9fd578133aef [offload] gfx1250-strict miscomputes waveSize (#5201)

WW42-2.2 carry forward
PLAT-214083 607d9e8f2d12 [AMDGPU] GFX125x: Relax global_inv/wb when NC MTYPE is not used (#235769)

WW42-2.1 carry forward
LCOMPILER-2886 e095f1b3becf [offload] add EF_AMDGPU_MACH_AMDGCN_GFX1250_STRICT to valid archs

WW42-2.0 carry forward
ROCM-32187 4208a88993d3 [AMDGPU] Fix packed bf16 inline constant folding with op_sel (#233292)
LCOMPILER-3031 d280c086e751 [AMDGPU] Fix gfx9-4-generic LDS allocation granule (#235163)

ROCm/llvm-project (amd-staging) Release Notes WW43

Range: 36c1564ff815158e4fdff0880ba90b5d628aa045..9fd578133aef175b0a5306c80ac60ebc7a636fc5
Size: 1892 commits (107 on the amd-staging first-parent line, 87 merge commits; the rest arrive

Commits touching each area (non-merge, approximate, areas overlap):
Clang 323, MLIR 151, AMDGPU backend 133, LLDB 102, Flang 81, libc 73, libc++ 49, Offload 40, CI/infra 32, compiler-rt 23, LLD 17, amd/ (Comgr, device-libs, hipcc) 19, OpenMP runtime 8.

1. AMDGPU backend

Summary: This is the busiest AMD-specific area, dominated by gfx12.5 (gfx125x/gfx1250) bring-up and correctness work, plus a long tail of True16 (16-bit register) selection fixes.

gfx1250 / gfx125x: SRAMECC is now hardwired ON for gfx12.5, xnack on/off is supported on gfx125x,
SWMMAC opcodes that gfx1250 does not support were removed from the MC layer, global_inv/global_wb
are relaxed when the NC MTYPE is not used, and load/store clause merging is disabled on gfx1250.
Downstream, the "gfx1250-strict" ELF machine flag was added to the valid-arch list and a wave-size
miscomputation for gfx1250-strict was fixed.
True16: roughly a dozen fixes to operand register classes (vgpr32_lo16 / hi16) for med3, sub,
cndmask_b16, fcopysign, sext_inreg, bswap, bf16 fpround, tbuffer d16 stores and flat/global/scratch
16-bit loads.
Packed math and SLP: gfx9 packed-FP32 SLP cost model refined for pair formation and shuffles;
fixes for gfx950 v_pk_{add,mul,fma}_f32 invalid op_sel (landed, reverted, relanded); packed bf16
inline-constant folding with op_sel fixed; scalar bf16 minimumnum/maximumnum widened to packed ops;
op_sel_hi encoding for 64-bit V_PK instructions.
Scheduling and hazards: deterministic VOPD pairing, TRANS WAR hazard detection for VOPD dual
destinations, debug/meta instructions no longer trigger hazard checks or wait merging, a heuristic
for CarriedLatencies, downward register-pressure tracking fixes, SSAMachineScheduler wired into the
optimized regalloc pipeline under the new pass manager.
LDS and Attributor: SwLowerLDS now lowers non-kernels using LDS and rebases flat-to-LDS
addrspacecasts onto buffer offsets; new Attributor attribute tracks LDSDMA use; the memory legalizer
lowers single-wave workgroup scope to wavefront when no LDSDMA is present; implicit-argument
attributes are created once; address-space AAs are only added for flat pointers.
ISel / GlobalISel: indexed image/sampler resource codegen, fold of add-into-zero dot accumulator,
64-bit setcc narrowing, uniform-unmerge and constrained-shift GlobalISel fixes, wrong ballot-NOT
uniformity fix, SDWA selection fix, buffer load.format returning any legal type.
Debug info: DW_AT_LLVM_address_space emitted for AMDGPU; vcc_hi has no DWARF register number;
single-block Fortran dummies located through a stack copy.
Misc: gfx9-4-generic LDS allocation granule fixed; .amdgcn_target no longer emitted per inline-asm
blob; LDS f64 atomic fadd fixed on gfx1310; the "RF"/"m" inline asm constraint was added and
reverted.
AMD downstream policy: runtime loop unrolling disabled; the amd-staging default
-slp-vectorize-once-used=false was restored then reverted again (Bump rocm-systems from 1c488dc to ca17aa8 #4976/Bump rocm-systems from 79e85e1 to 392010c #5049).

Top 15 features/fixes (AMDGPU backend):

Hardwire SRAMECC ON for gfx12.5 (#232985) 2. Support xnack on/off on gfx125x (#232080) 3. gfx1250-strict wave-size fix and valid-arch ELF flag (Test Issue for the Jira CLoud #5201) 4. GFX125x: relax global_inv/wb when NC MTYPE is not used (#235769) 5. Stop merging loads/stores into clauses on gfx1250 (#231269) 6. SwLowerLDS: lower non-kernels using LDS, assign kernel IDs to callers (#228043) 7. Codegen for indexed image/sampler resources (#231457) 8. Refine gfx9 packed-FP32 SLP costs (#208572) 9. Fix packed bf16 inline constant folding with op_sel (#233292) 10. Handle gfx950 v_pk_{add,mul,fma}_f32 invalid op_sel (#232016) 11. Fix gfx9-4-generic LDS allocation granule (#235163) 12. Emit DW_AT_LLVM_address_space for AMDGPU (#220789) 13. Fix wrong uniformity for ballot NOT in UniformIntrinsicCombine (#220009) 14. Wire SSAMachineScheduler into the optimized regalloc pipeline, new PM (#229737) 15. Track LDSDMA invocations in the Attributor; lower single-wave workgroup scope (#229133, #224065)

2. OpenMP runtime and Offload (liboffload / libomptarget)

Summary: The theme is moving the OpenMP runtime onto liboffload and decoupling it from the AMDGPU plugin interface, along with several xteam-reduction and launch-geometry fixes for AMD GPUs.

liboffload migration: libomptarget now loads and resolves device binaries, manages events and checks
accessible pointers through liboffload. Device property accesses, kernel record/replay calls, the
OMP ABI version, the offload policy and the interop table were moved out of PluginInterface /
PluginManager (mostly NFC refactors, each backported to amd-staging).
AMDGPU plugin: a host device is created for each CPU agent (landed, reverted, relanded); dynamic HSA
version and symbol checks; per-launch device allocations in libomptarget are cached.
Kernel launch and reductions: the kernel max-threads value is preserved with _wg_size; grid size
selection converges; wave32 handling of xteam reductions fixed; single-thread SPMD cross-team
reductions fixed.
OMPT and tooling: source locations of data transfers and synchronization are reported; the native
device binary is passed to the device_load OMPT callback.
liboffload API: AsyncInfo is usable after olDestroyQueue, null device handles are allowed in
olMemCpy, MEMORY_CLOCK_RATE may return 0, memory leaks fixed, olInit/olShutDown docs improved.
Level Zero: incorrectly reported device limits adjusted.
Runtime: LIBOMP_OMPD_SUPPORT usage matched to upstream.

Top 15 features/fixes (OpenMP / Offload):

Load and resolve device binaries through liboffload (#231545, Install aux-overlay directory symlinks with CMake code #5042) 2. Manage events through liboffload (#226444) 3. Create a host device for each CPU agent (#233099, Bump rocm-libraries from 89b3fc4 to 2e37c5d #5050) 4. Grid size selection convergence (Bump rocm-systems from ca17aa8 to 986a18c #5000) 5. Keep the kernel's max threads with _wg_size ( Fix kpack dependency check to verify manifest contents #4970) 6. Fix wave32 handling of xteam reductions (#233096) 7. Fix single-thread SPMD cross-team reductions (#231843) 8. Cache per-launch device allocations of libomptarget (#231570, [Issue] Windows PyTorch tests crash with access violation in amdhip64_7.dll during MemPool / graph capture (exit code 139) #4958) 9. Report source location of data transfers and synchronization (OMPT) (#232438) 10. Pass native device binary to the device_load OMPT callback (#232478) 11. Dynamic HSA version and symbol checks in the AMDGPU plugin (#228569) 12. Decouple device property accesses from Plugin Interface (#231932, [ci] Turning off AWS CPU builders #5034) 13. Move kernel RecordReplay calls out of PluginInterface (#232349, Re-staged dist/include headers cause downstream ccache misses on every full rebuild #5009) 14. Allow AsyncInfo use after olDestroyQueue (#234234) 15. Add EF_AMDGPU_MACH_AMDGCN_GFX1250_STRICT to valid archs; fix its waveSize (Test Issue for the Jira CLoud #5201)

3. Clang, HIP, CUDA, OpenCL, SPIR-V and ClangIR

Summary: Clang is the largest area by commit count, but most is upstream. GPU-relevant changes are stricter HIP/CUDA device-code diagnostics, clang-repl HIP groundwork, and heavy ClangIR (CIR) work for AMDGPU/HIP lowering.

HIP/CUDA semantics: deferred diagnostics for force-emitted functions are now reported; RTTI
operations are rejected in device code; exception-handling diagnostics in device code cleaned up;
ctor/member initializers followed when emitting deferred diagnostics; lambda numbering fixed for
reopened namespaces; calling convention fixed for forward-declared kernels; dynamic initialization
with RDC and host profiling fixed; the hip_atomic deprecation warning is enabled by default.
AMDGPU builtins: builtins using long int for 64-bit operands corrected.
clang-repl: -hip option added, OffloadType enum and HIP device parser skeleton introduced, builtin
bitcode linked into every PTU.
SPIR-V: size optimization for AMDGCN-flavoured SPIR-V. A rework of -spirv-preserve-auxdata handling
was reverted downstream.
ClangIR: AMDGPU wired into call-convention lowering; HIP managed variables; kernel-handle linkage;
LDS load and cluster-load builtins; workgroup_size builtins; __builtin_amdgcn_fence lowering;
!noalias.addrspace and !amdgpu.no.fine.grained.memory metadata on atomics; skipped global init for
device and shared variables. Downstream, CIR is disabled in the build ("revPat") and CI no
longer explicitly builds it.
OpenMP in Clang: loop-transforming constructs allowed in simd regions (OpenMP 6.0); construct
context at TARGET fixed; host captures' lifetimes preserved; deferred host diagnostics flushed;
crash on erroneous atomic fixed. The flatten floating-point trip-count change was reverted.
Other: TargetID parsing from AMDGPUTargetParser reverted again (#213824); C2y stdc_load8_*
functions; DWARF/debug-info line attribution fixes.

Top 15 features/fixes (Clang/HIP/CIR):

Report deferred diagnostics of force-emitted functions in CUDA/HIP (#229008) 2. Reject RTTI operations in HIP/CUDA device code (#228469) 3. Enable hip_atomic deprecation warning by default (#230378) 4. Fix HIP dynamic initialization with RDC and host profiling (#233655) 5. clang-repl: add -hip option (#231783) 6. clang-repl: link builtin bitcode into every PTU (#229788) 7. Fix AMDGPU builtins using long int for 64-bit operands (#231500) 8. CIR: wire AMDGPU into call-convention lowering (#220197) 9. CIR: HIP managed variables (#230910) 10. CIR: AMDGPU LDS load / cluster load builtins (#233756) 11. CIR: complete __builtin_amdgcn_fence lowering (#230829) 12. CIR: noalias.addrspace and no.fine.grained/remote metadata on atomics (#232350, #233440) 13. Size optimisation for AMDGCN-flavoured SPIR-V (#228188) 14. OpenMP 6.0: loop-transforming constructs in simd regions (#231852) 15. Fix calling convention for forward-declared CUDA/HIP kernels (#231628)

4. Flang (Fortran) and MLIR

Summary: Mostly upstream. OpenMP semantics and lowering saw the most activity, alongside debug-info quality fixes and a new loop-versioning optimization. AMD added fixes for Flang OpenMP xfails and device debug info.

OpenMP: metadirective handling (conditions compared by symbol identity, NOTHING with clauses kept,
exec metadirective placement), DECLARE_SIMD ignored with a warning, sections handled in target
clause extraction, LINEAR privatization with ALLOCATABLE support, non-delayed privatization of
dummy proc pointers, implicit symbols for locals fixed, ATOMIC capture diagnostics, atomicrmw for
atomic update, better modifier diagnostics, plus Flang xfails fixed on amd-staging (Multi-arch: Rename internal structure of rocm_sdk_libraries wheel #5048).
Optimization: new pass to version innermost loops on a likely-constant trip count, enabled at -O3
via -f[no-]version-loops-for-trip-count; HLFIR array expansion decoupled from optimization level;
COMPLEX(4)**INTEGER rounds to single precision once.
Debug info: DW_AT_type for string types, real/complex types named by kind, prologue_end placement on
the first executable statement, LICM-hoisted ops lose their line, AMDGPU dummy args located through
a stack copy.
CUDA Fortran/OpenACC: delayed descriptor allocs kept out of CFG loops, ignore_denormal_mode on
atomicadd, OpenACC frontend decoupled from GPU operations.
MLIR: LLVM dialect gains getElementOffset and a "distinct" loop-annotation ID; cf.switch
canonicalization; analysis libraries split into subsystems; TOSA assertion fixes; XeVM and AMX
updates; linalg rank-reducing vectorization fix.

Top 15 features/fixes (Flang/MLIR):

Loop versioning on likely-constant trip counts (#231205, #231207) 2. OpenMP LINEAR privatizers with ALLOCATABLE support (#228827) 3. Metadirective fixes: symbol-identity compare, NOTHING, exec placement (#233581, #233981, #233147) 4. Preserve host capture lifetimes in OpenMP lowering (#218453) 5. Expand atomicrmw for OpenMP atomic update (#215654) 6. Handle sections in target clause extraction (#232084) 7. Fix non-delayed privatization of dummy proc pointers (#232752) 8. Flang OpenMP xfails fixed on amd-staging (Multi-arch: Rename internal structure of rocm_sdk_libraries wheel #5048) 9. AMDGPU debug: locate single-block dummies via stack copy 10. Debug: prologue_end on first executable statement (#232025) 11. Debug: DW_AT_type for DW_TAG_string_type (#231960) 12. Add fir.assert and LLVM codegen (#231245) 13. Round COMPLEX(4)**INTEGER to single precision once (#230257) 14. MLIR: add 'distinct' ID to loop-annotate attribute (#233890) 15. OpenACC frontend decoupled from GPU operations (#233103)

5. Comgr, device-libs and hipcc (amd/)

Summary: Comgr work centers on the new assembly transpiler, with updates for gfx12.5 and test maintenance for LLVM API renames.

Transpiler: F32 K=4 WMMA remapping, register-held PC-relative displacements, missing floating-point
arithmetic forms and modifiers.
gfx12.5: ISA-name parsing expectations updated for XNACK; transpiler buffer tests adjusted for
fixed SRAM ECC.
Maintenance: adapted to renamed IR APIs (getFirstNonPHIOrAlloca, PseudoProbeInst checks), lit tool
dependencies fixed, flaky transpiler/parse-isa-name tests xfailed.

Top features/fixes (Comgr):

Transpiler: F32 K=4 WMMA remapping ([compiler] build tools for code cov #4931) 2. Transpiler: register-held PC-relative displacements ([Issue] composable_kernel configure fails in packaging CI: HIP_ARCHITECTURES is empty (GPU_TARGETS/GPU_ARCHS unset) #4918) 3. Transpiler: floating-point arithmetic forms and modifiers (Bump rocm-systems from 02cff50 to 9d6350e #4951) 4. gfx12.5 XNACK ISA parsing expectations (Check for tarball deletion #4992) 5. Transpiler buffer tests for fixed SRAM ECC (test(rocwmma): default CTest --parallel to 1 (ROCM-24171) #5061) 6. test-lit tool dependency fix (ww18 amd-compiler-2026-4-30 #4955) (Fewer than 15 meaningful changes landed in this area.)

6. LLVM middle-end, other targets and debug info

Summary: Upstream activity across optimization passes and CPU backends. AArch64 (53 commits), RISC-V
(29) and X86 (23) lead; NVPTX 10 and SPIR-V 13.

Optimizers: ConstraintElimination soundness fixes (GEP scales, signed overflow), InstCombine
ctlz/cttz fix, VPlan latch phis, LoopPeel, TailCallElim, MemProf ThinLTO and clone-number fixes, SLP
alternate-store splitting, DFSan recursion fix.
Debug/symbol tooling: llvm-gsymutil reads .gnu_debugdata; xz (lzma) decompression ported from LLDB
into LLVM Support.
Downstream reverts: alias scope domains with disjoint scopes (#218768), PromoteMemToReg
store-undef for lifetime markers (#218935), DataLayout overwrite in the backend (#224012), and two
LifetimeSafety warnings.

Top 15 features/fixes:

llvm-gsymutil reads function symbols from .gnu_debugdata (#227159) 2. Port xz/lzma decompression from LLDB into Support (#220092) 3. Per-context options (CodeGen, MC, Passes, Scalar, Instrumentation, CGData) (#232365, #232599) 4. SSAMachineScheduler in new-PM optimized regalloc pipeline (#229737) 5. InstCombine: canonicalize atomicrmw sub of a constant to add (#232626) 6. ConstraintElimination: exact right-shift extension (#223207) 7. ConstraintElimination: GEP signed/unsigned fixes (#233858, #231421) 8. InstCombine ctlz/cttz xor fold for non-power-of-two widths (#233746) 9. VPlan: latch phis for all values used in the middle block (#233227) 10. TailCallElim: drop poison-generating attrs from accumulator (#233527) 11. MemProf: ThinLTO ICP for local indirect call targets (#233242) 12. Attributor: sorted offsets for constant vector stores (#231079) 13. DFSan: fix infinite recursion on argument callbacks (#233982) 14. RISC-V P-ext fold/intrinsics (#233951, #232316) 15. NVPTX: dp4a/dp2a builtins for CUDA 13.4 (#233434)

7. LLDB, LLD, compiler-rt, libc and libc++

Summary: Upstream-driven.

LLDB (102 commits): objc_runtime_name DWARF support, extension listing in help scripting-extension,
lldb-dap documentation and exceptionInfo changes, kext search ordering, SymStore robustness, many
internal API cleanups.
LLD (17): --print-icf-sections prints classes in input order, bp-ordering page-fault fix, RISC-V
arch-string fixes.
libc (73): popen/pclose, execvpe, eventfd, regex anchors, gettext stubs, float-only tanf/asinbf16,
syscall-wrapper conversions for sched_* functions, bare-metal Hexagon port.
libc++ (49): C++26 macOS CI, LNT v5 benchmark pipelines and reusable workflows.

Top 15 features/fixes:

libc: popen/pclose (#232846)
libc: execvpe (#234071)
libc: sys/eventfd.h and eventfd (#234028) 4. libc: regex '^' / '$' anchors and line flags (#233780) 5. libc: remaining <libintl.h> gettext stubs (#233838) 6. libc: float-only tanf (#233046) 7. libc: bare-metal Hexagon port (#217528) 8. libc: sched_{get,set}param / rr_get_interval syscall wrappers 9. LLDB: objc_runtime_name DWARF annotations (#233648) 10. LLDB: list registered extensions in help scripting-extension (#232891) 11. LLDB: lldb-dap extension docs (#233529) 12. LLDB: lldb-dap raw stop info from exceptionInfo (#231760) 13. LLD: --print-icf-sections prints in input order (#233345) 14. LLD: fix bp page-fault area calculation (#230566) 15. libc++: LNT v5 benchmark pipelines (#232888)

8. CI and infrastructure (AMD-specific)

Summary: Heavy "merge main into amd-staging" cadence (roughly 60 syncs in this range), automated TheRock baseline bumps, and PSDB / trunk-verifier changes.

The compiler-ci TheRock baseline was bumped about 10 times by automation.
Trunk commit verifier is dispatched from amd-staging, with Linux and Windows split into separate
jobs and increased git depth.
PSDB: manylinux image bumped to CMake 3.31.12; SPIR-V example tests link the HIP runtime
(-lamdhip64); rocgdb-gpu temporarily excluded from PSDB, then restored.
AMD's .github/workflows is preserved on every merge; a -parallel-jobs= option placeholder was added.
Clang CI no longer explicitly builds ClangIR.

Top features/fixes:

Dispatch trunk commit verifier from amd-staging (#f2fc5f6) 2. Split Linux/Windows trunk verifier jobs 3. Increase git depth for trunk PR verification 4. Bump PSDB manylinux image to CMake 3.31.12 5. Link HIP runtime in SPIR-V example tests 6. Pass -lamdhip64 on the SPIR-V example link line 7. TheRock baseline bumps (60eed59, 1928dfd, 4d992b3, ac00825, 594c570, 6c7724e, 4639f91) 8. Preserve AMD workflows across upstream merges 9. Do not explicitly build ClangIR in CI (#234384) 10. Flang: GitHub action to check for full-pipeline tests (#221766)

llvm 9fd578133aef spirv ff3483af hipify d364ef40 JIRA ID : https://amd-hub.atlassian.net/browse/LCOMPILER-2886 JIRA ID : https://amd-hub.atlassian.net/browse/ROCM-32187 JIRA ID : https://amd-hub.atlassian.net/browse/LCOMPILER-3031 JIRA ID : https://amd-hub.atlassian.net/browse/LCOMPILER-2986 JIRA ID : https://amd-hub.atlassian.net/browse/LCOMPILER-2886 JIRA ID : https://amd-hub.atlassian.net/browse/LCOMPILER-2866 JIRA ID : https://amd-hub.atlassian.net/browse/LCOMPILER-2972 JIRA ID : https://amd-hub.atlassian.net/browse/LCOMPILER-2727 JIRA ID : https://amd.atlassian.net/browse/PLAT-214083 JIRA ID : https://amd-hub.atlassian.net/browse/LCOMPILER-3061 JIRA ID : https://amd-hub.atlassian.net/browse/LCOMPILER-3061 LCOMPILER-2866 9fd578133aef [offload] gfx1250-strict miscomputes waveSize (#5201) LCOMPILER-2986 3696d0a890f3 Revert "[IR] Add alias scope domains with disjoint scopes (#218768)" LCOMPILER-2886 4b73beafc162 [AMDGPU] vcc_hi has no DWARF register number LCOMPILER-2972 d9f5fb07050d Revert "[NFC][HIP][SPIRV] Rework -spirv-preserve-auxdata handling. (#227875)" LCOMPILER-2727 fe993e2c54f3 Revert "Re-apply "[PromoteMemToReg] Insert store undef when removing lifetime markers" (#218935)" LCOMPILER-2866 673789cc0b25 [runtime unroll] disable runtime unroll LCOMPILER-3061 3b0375b65a7e Revert "[SLP] Restore amd-staging default -slp-vectorize-once-used=false (#4976)" (#5049) WW42-2.3 carry forward LCOMPILER-2886 9fd578133aef [offload] gfx1250-strict miscomputes waveSize (#5201) WW42-2.2 carry forward PLAT-214083 607d9e8f2d12 [AMDGPU] GFX125x: Relax global_inv/wb when NC MTYPE is not used (#235769) WW42-2.1 carry forward LCOMPILER-2886 e095f1b3becf [offload] add EF_AMDGPU_MACH_AMDGCN_GFX1250_STRICT to valid archs WW42-2.0 carry forward ROCM-32187 4208a88993d3 [AMDGPU] Fix packed bf16 inline constant folding with op_sel (#233292) LCOMPILER-3031 d280c086e751 [AMDGPU] Fix gfx9-4-generic LDS allocation granule (#235163)

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ronlieb · 2026-11-03T15:15:15Z

moving to 43-1.5 , this one is on hold/nogo

ronlieb requested review from lajagapp and pradeepk31 November 1, 2026 22:45

ronlieb added the ci:run-all-archs Opt-in to building for all architectures on a pull request label Nov 1, 2026

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chore(compiler) : set submodule pointer for Compiler ww43-1.4 - #9673

chore(compiler) : set submodule pointer for Compiler ww43-1.4#9673
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ROCm/llvm-project (amd-staging) Release Notes WW43

1. AMDGPU backend

2. OpenMP runtime and Offload (liboffload / libomptarget)

3. Clang, HIP, CUDA, OpenCL, SPIR-V and ClangIR

4. Flang (Fortran) and MLIR

5. Comgr, device-libs and hipcc (amd/)

6. LLVM middle-end, other targets and debug info

7. LLDB, LLD, compiler-rt, libc and libc++

8. CI and infrastructure (AMD-specific)

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