[Bugfix][V1] Support heterogeneous KV page sizes in KVBlockZeroer - #16
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KVBlockZeroer asserted that every attention layer shares one physical page
size. Any model that mixes page sizes across its attention specs therefore
fails at startup:
AssertionError: Non-uniform page sizes: 8192 vs 4096
vllm/v1/worker/utils.py in KVBlockZeroer.__init__
MiniMax-M3 hits this whenever KV zeroing is on. Its sparse-attention layers
register a key-only MLAAttentionSpec for the indexer side cache alongside the
main K+V cache, so the two page sizes differ by construction. With
--kv-cache-dtype fp8 the bf16 side cache also makes the config
mixed-precision, which is exactly what sets needs_kv_cache_zeroing, so the
engine dies in initialize_from_config before serving anything. EAGLE3 draft
layers with a different GQA width under TP are a second instance.
Group segment addresses by page size instead of asserting a single one, and
launch the zeroing kernel once per distinct page size. Single-page-size
models keep a one-entry list and identical behavior.
Signed-off-by: fai <fangzhouai@gmail.com>
Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
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Closing: this fixes the symptom in shared vLLM infrastructure, and the preference is to keep MiniMax-M3 changes inside the model. The cause is a MiniMax-M3 configuration that should not be built in the first place: a bf16 indexer side cache beside an fp8 main KV cache makes the KV cache mixed-precision, which turns on block zeroing, and the zeroer then rejects the two page sizes (8192 vs 4096). NVIDIA already avoids this by construction — Known gap left open: setting |
Purpose
KVBlockZeroerassumed every attention layer shares one physical page size:Any model that mixes page sizes across its attention specs therefore fails at startup,
inside
initialize_from_config, before serving a single request.Reproducer
MiniMax-M3 on ROCm, TP4,
--kv-cache-dtype fp8:Two independent properties of the model combine to make this unavoidable:
MiniMaxM3Indexer.get_kv_cache_specregisters a key-only
MLAAttentionSpecfor the indexer side cache (1 head,index_head_dim), alongside the main K+V attention cache. 8192 vs 4096 elements.needs_kv_cache_zeroingishas_mamba_layers or has_mixed_precision_kv_cache. M3 has no Mamba layers, but with--kv-cache-dtype fp8the main cache is fp8 while the indexer side cache is bf16 —mixed precision, so zeroing engages and
KVBlockZeroeris constructed.Neither is opt-in, so MiniMax-M3 with an fp8 KV cache cannot start on current main.
This is independent of
VLLM_ROCM_SHUFFLE_KV_CACHE_LAYOUT/ the AITER sparse-PA path —get_kv_cache_spechas no dependence on either.EAGLE3 draft layers with a different GQA width under TP are a second instance of the
same shape.
Fix
Group segment addresses by page size (
dict[int, list[int]]) instead of asserting asingle one, store one metadata entry per distinct page size, and launch the zeroing
kernel once per entry. A single-page-size model keeps a one-element list and identical
behavior — same grid, same kernel arguments.
Test Plan and Result
tests/v1/worker/test_kv_block_zeroer.pyupdated for the new_metashape (list oftuples rather than a bare tuple); the in-flight-copy behavior it asserts is unchanged.
End-to-end on MI355X, MiniMax-M3-MXFP4, TP4,
--kv-cache-dtype fp8:initialize_from_config, as above.init engine (profile, create kv cache, warmup model) took 28.56 s, serverserves normally.
Lint:
ruff checkandruff format --check(v0.14.0, as pinned in.pre-commit-config.yaml) clean.pre-commititself could not run — nopre_commitmodule in the venv — so the hooks were run manually.
Duplicate check
gh pr list --repo vllm-project/vllm --state open --searchover "KVBlockZeroer","Non-uniform page sizes", "needs_kv_cache_zeroing", "kv cache zeroing page size",
"mixed precision kv cache zero", plus an issue search. Nothing covers this assertion.
The closest, vllm-project#36617, is prefix caching for hybrid models with non-uniform page sizes — a
different code path (scheduler-side allocation, not the worker-side zeroer).
Notes
Draft pending the full benchmark sweep this unblocks. AI assistance (Claude Code) was
used for this change.