stm32: xspi: Allow flash driver usage in RAM_LOAD mode

boards/st/stm32n6570_dk/stm32n6570_dk_common.dtsi

@@ -23,7 +23,7 @@
 		zephyr,touch = &gt911;
 		spi-flash0 = &mx66uw1g45g;
 		zephyr,flash-controller = &mx66uw1g45g;
-		zephyr,flash = &mx66uw1g45g;
+		zephyr,flash = &ext_flash;
 		zephyr,code-partition = &slot0_partition;
 	};
 
@@ -406,32 +406,40 @@ zephyr_udc0: &usbotg_hs1 {
 		four-byte-opcodes;
 		status = "okay";
 
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			/*
-			 * Following flash partition is dedicated to the use of bootloader
-			 */
-			boot_partition: partition@0 {
-				label = "mcuboot";
-				reg = <0x00000000 DT_SIZE_K(64)>;
-			};
-
-			slot0_partition: partition@10000 {
-				label = "image-0";
-				reg = <0x10000 DT_SIZE_K(1536)>;
-			};
-
-			slot1_partition: partition@210000 {
-				label = "image-1";
-				reg = <0x210000 DT_SIZE_K(1536)>;
-			};
-
-			storage_partition: partition@410000 {
-				label = "storage";
-				reg = <0x410000 DT_SIZE_K(64)>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0x0 0x70000000 DT_SIZE_M(128)>;
+
+		ext_flash: ext-flash@0 {
+			compatible = "soc-nv-flash";
+			reg = <0x0 DT_SIZE_M(128)>;
+			write-block-size = <1>;
+			erase-block-size = <DT_SIZE_K(4)>;
+
+			partitions {
+				compatible = "fixed-partitions";
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				boot_partition: partition@0 {
+					label = "mcuboot";
+					reg = <0x00000000 DT_SIZE_K(64)>;
+				};
+
+				slot0_partition: partition@10000 {
+					label = "image-0";
+					reg = <0x10000 DT_SIZE_K(1536)>;
+				};
+
+				slot1_partition: partition@210000 {
+					label = "image-1";
+					reg = <0x210000 DT_SIZE_K(1536)>;
+				};
+
+				storage_partition: partition@410000 {
+					label = "storage";
+					reg = <0x410000 DT_SIZE_K(64)>;
+				};
 			};
 		};
 	};

drivers/flash/flash_stm32_xspi.c

@@ -997,6 +997,7 @@ static int stm32_xspi_set_memorymap(const struct device *dev)
 	LOG_DBG("MemoryMap mode enabled");
 	return 0;
 }
+#endif /* CONFIG_STM32_MEMMAP */
 
 static int stm32_xspi_abort(const struct device *dev)
 {
@@ -1009,18 +1010,14 @@ static int stm32_xspi_abort(const struct device *dev)
 
 	return 0;
 }
-#endif /* CONFIG_STM32_MEMMAP */
 
-
-#if defined(CONFIG_STM32_MEMMAP) || defined(CONFIG_STM32_APP_IN_EXT_FLASH)
 /* Function to return true if the octoflash is in MemoryMapped else false */
 static bool stm32_xspi_is_memorymap(const struct device *dev)
 {
 	struct flash_stm32_xspi_data *dev_data = dev->data;
 
 	return stm32_reg_read_bits(&dev_data->hxspi.Instance->CR, XSPI_CR_FMODE) == XSPI_CR_FMODE;
 }
-#endif
 
 /*
  * Function to erase the flash : chip or sector with possible OCTO/SPI and STR/DTR
@@ -1218,7 +1215,7 @@ static int flash_stm32_xspi_read(const struct device *dev, off_t addr,
 		return 0;
 	}
 
-#if defined(CONFIG_STM32_MEMMAP) || defined(CONFIG_STM32_APP_IN_EXT_FLASH)
+#if defined(CONFIG_STM32_MEMMAP) || (defined(CONFIG_STM32_APP_IN_EXT_FLASH) && defined(CONFIG_XIP))
 	ARG_UNUSED(dev_cfg);
 	ARG_UNUSED(dev_data);
 	/*
@@ -1314,7 +1311,7 @@ static int flash_stm32_xspi_read(const struct device *dev, off_t addr,
 	xspi_unlock_thread(dev);
 
 	return ret;
-#endif /* CONFIG_STM32_MEMMAP || CONFIG_STM32_APP_IN_EXT_FLASH */
+#endif /* CONFIG_STM32_MEMMAP || (CONFIG_STM32_APP_IN_EXT_FLASH && CONFIG_XIP) */
 }
 
 /* Function to write the flash (page program) : with possible OCTO/SPI and STR/DTR */
@@ -2093,7 +2090,7 @@ static int flash_stm32_xspi_init(const struct device *dev)
 		return -ENODEV;
 	}
 
-#ifdef CONFIG_STM32_APP_IN_EXT_FLASH
+#if defined(CONFIG_STM32_APP_IN_EXT_FLASH) && defined(CONFIG_XIP)
 	/* If MemoryMapped then configure skip init
 	 * Check clock status first as reading CR register without bus clock doesn't work on N6
 	 * If clock is off, then MemoryMapped is off too and we do init
@@ -2108,7 +2105,7 @@ static int flash_stm32_xspi_init(const struct device *dev)
 			return 0;
 		}
 	}
-#endif /* CONFIG_STM32_APP_IN_EXT_FLASH */
+#endif /* CONFIG_STM32_APP_IN_EXT_FLASH && CONFIG_XIP */
 
 	/* The SPI/DTR is not a valid config of data_mode/data_rate according to the DTS */
 	if ((dev_cfg->data_mode != XSPI_OCTO_MODE)
@@ -2195,13 +2192,30 @@ static int flash_stm32_xspi_init(const struct device *dev)
 		dev_data->hxspi.Init.DelayHoldQuarterCycle = HAL_XSPI_DHQC_ENABLE;
 	}
 
+	if (stm32_xspi_is_memorymap(dev)) {
+		/* Memory map could have been set by previous application */
+		/* Force HAL instance in correct state */
+		dev_data->hxspi.State = HAL_XSPI_STATE_BUSY_MEM_MAPPED;
+	}
+
 	if (HAL_XSPI_Init(&dev_data->hxspi) != HAL_OK) {
 		LOG_ERR("XSPI Init failed");
 		return -EIO;
 	}
 
 	LOG_DBG("XSPI Init'd");
 
+	if (stm32_xspi_is_memorymap(dev)) {
+		/* Memory map could have been set by previous application */
+		/* Abort to allow following card oriented transactions */
+		/* If needed by the application, it will be re-enabled just after */
+		ret = stm32_xspi_abort(dev);
+		if (ret != 0) {
+			LOG_ERR("Failed to abort memory-mapped access before init");
+			return ret;
+		}
+	}
+
 #if defined(HAL_XSPIM_IOPORT_1) || defined(HAL_XSPIM_IOPORT_2) || \
 	defined(XSPIM) || defined(XSPIM1) || defined(XSPIM2)
 	/* XSPI I/O manager init Function */

west.yml

@@ -23,6 +23,8 @@ manifest:
       url-base: https://github.com/zephyrproject-rtos
     - name: babblesim
       url-base: https://github.com/BabbleSim
+    - name: mcu-tools
+      url-base: https://github.com/mcu-tools
 
   group-filter: [-babblesim, -optional]
 
@@ -321,7 +323,8 @@ manifest:
       groups:
         - crypto
     - name: mcuboot
-      revision: f3cc9476e233364031e9ab842290392f260fba82
+      remote: mcu-tools
+      revision: pull/2547/head
       path: bootloader/mcuboot
       groups:
         - bootloader