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dts: bindings: dwc2: add extra hardware registers and devicetree entries #103015

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dts: bindings: dwc2: add extra hardware registers and devicetree entries #103015

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2 changes: 2 additions & 0 deletions dts/arm/syna/sr100.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -189,8 +189,10 @@
num-out-eps = <8>;
num-in-eps = <8>;
clocks = <&gcr SYNA_USB_CLK>;
gsnpsid = <0x5532430a>;
ghwcfg1 = <0x00000000>;
ghwcfg2 = <0x02882054>; // 8 endpoints, dynamic sizing
ghwcfg3 = <0x0c78c468>;
Comment on lines +192 to +195
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@jfischer-no jfischer-no Apr 27, 2026

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As for the other partial UHC DWC2 PRs, this change should be included in UHC DWC2 PR #102967. Also, there is no need to provide what is available at runtime through DT. ghwcfg1, ghwcfg2, and ghwcfg4 are workarounds for the peculiarities of nRF54 family.

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@josuah josuah Apr 27, 2026

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Ok, so removing ghwcfg3 and reading this information from hardware registers instead.

Should there still be gsnpsid?

If not, then it is possible to use gsnpsid != 0 to detect when the DWC2 core is not available (i.e. in ESP32-S3 before the PHY is powered on).

ghwcfg4 = <0xe2003e20>; // 9 in endpoints, desc-DMA
status = "disabled";
};
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11 changes: 11 additions & 0 deletions dts/bindings/usb/snps,dwc2.yaml
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Expand Up @@ -31,6 +31,11 @@ properties:
description: |
Number of configured IN endpoints including control endpoint.

gsnpsid:
type: int
description: |
Value of the GSNPSID register, used to declare the version of the core.

ghwcfg1:
type: int
required: true
Expand All @@ -45,6 +50,12 @@ properties:
Value of the GHWCFG2 register. It is used to determine available endpoint
types during driver pre-initialization.

ghwcfg3:
type: int
description: |
Value of the GHWCFG3 register. It is used to determine available endpoint
types during driver pre-initialization.

ghwcfg4:
type: int
required: true
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2 changes: 2 additions & 0 deletions dts/vendor/nordic/nrf54h20.dtsi
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Expand Up @@ -670,8 +670,10 @@
interrupts = <134 NRF_DEFAULT_IRQ_PRIORITY>;
num-in-eps = <8>;
num-out-eps = <10>;
gsnpsid = <0x4f54430a>;
ghwcfg1 = <0xaa555000>;
ghwcfg2 = <0x22abfc72>;
ghwcfg3 = <0x0beac0e8>;
ghwcfg4 = <0x1e10aa60>;
status = "disabled";
};
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2 changes: 2 additions & 0 deletions dts/vendor/nordic/nrf54lm20_a_b.dtsi
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Expand Up @@ -249,8 +249,10 @@
interrupts = <90 NRF_DEFAULT_IRQ_PRIORITY>;
num-in-eps = <16>;
num-out-eps = <16>;
gsnpsid = <0x4f54500b>;
ghwcfg1 = <0x0>;
ghwcfg2 = <0x22affc52>;
ghwcfg3 = <0x0be0c0e8>;
ghwcfg4 = <0x3e10aa60>;
status = "disabled";
};
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2 changes: 2 additions & 0 deletions dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi
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Expand Up @@ -436,8 +436,10 @@
clocks = <&clock ESP32_USB_MODULE>;
num-out-eps = <6>;
num-in-eps = <6>;
gsnpsid = <0x4f54400a>;
ghwcfg1 = <0x00000000>;
ghwcfg2 = <0x224dd930>;
ghwcfg3 = <0x00c804b5>;
ghwcfg4 = <0xd3f0a030>;
};

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