pinctrl: introduce pin configuration autogenerator

[gmarull]

This PR adds support for autogenerating valid pin configurations for GD32 devices based on a set of configuration files build from datasheets/reference manuals. The script supports both, devices using the remap model, e.g. GD32F103 and devices using the alternate function model, e.g. GD32F450.

The autogenerated definitions contain the following information:

Remap/AFIO model:

• Port (e.g. A, B, C...)
• Pin number (0...15)
• Mode (input, alternate, analog)
• AFIO configuration (PCF0/1, PCFx position, PCFx width, PCFx selection)

AF model:

• Port (e.g. A, B, C...)
• Pin number (0...15)
• Mode (ANALOG, AFx, x=0..15)

The definitions can be used later in a pinctrl driver like this:

#include <dt-bindings/pinctrl/gd32vf103c(b-8)xx-pinctrl.h>

&pinctrl {
    usart1_default: usart1_default {
        pins1 {
            pinmux = <USART1_TX_PD5_RMP>, <USART1_CTS_PD3_RMP>;
        };
        pins2 {
            pinmux = <USART1_RX_PD6_RMP>, <USART1_RTS_PD4_RMP>;
            bias-pull-up;
        };
    };
};

Considerations:

• Remap suffix is added for signals that can be remapped (AFIO model). This makes it easier to spot misconfigurations (all signals need to have the same suffix on a peripheral, since remap happens to all peripheral signals)
• Linux model for STM32 is considered for representation. This model is quite flexible and allows solving problems like this which can't be solved in a node-based approach. Node-based approach also requires to generate a node per supported state, making it harder to extend to future states.
• No "defaults" are introduced as in STM32 (not possible with defines anyway). While it's true that in some cases some settings will always be applied, e.g., open-drain for I2C, many others depend on PCB layout or peripheral operating conditions. Therefore, it doesn't make sense to add "defaults".

[nandojve]

Need clarify better documentation. It is not clear how user will pick model AFIO vs AF.
Need review package, see comment at docs.

[nandojve]

Can you rebase and send an update?

[gmarull]

Changed "package" to "pincount" to make naming more clear

[nandojve]

LGTM

Very nice @gmarull !

[gmarull]

@cameled reviews welcome

[cameled]

From GD32 MCU Selection Guide, GD32F405/407 BGA100 and LQPF100 package both have 82 IO pins. But actually, the BGA100 doesn't have the PD8 pin. It can be check at datasheet 2.3, 2.6 section. GD32F403 doesn't have this issue.

I think it's a GigaDevice mistake, they told GD32F405/407 BGA100 have 82 IO too, but actually is 81.

[gmarull]

We can probably document that in the config file with a comment (or allow inserting comments from the config file to the generated headers). Let's do that when we introduce F405/407

[cameled]

LGTM, great work!

[cameled]

Since I'm not familiar with pinctrl related area, just add some comment.

[nandojve]

Hi @gmarull ,

I was wondering what is pending since we still have a DNM Label.
I think we already have a substantial work but not sure if still require more tests or you will work in docs.

[gmarull]

Hi @gmarull ,

I was wondering what is pending since we still have a DNM Label. I think we already have a substantial work but not sure if still require more tests or you will work in docs.

I think it's ready, just resolved a small issue spotted by @cameled