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Use Undefined instruction with payload to carry over TrapInformation on Singlepass #2836

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May 11, 2022
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8 changes: 4 additions & 4 deletions Cargo.lock

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4 changes: 2 additions & 2 deletions lib/compiler-singlepass/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -19,8 +19,8 @@ rayon = { version = "1.5", optional = true }
hashbrown = { version = "0.11", optional = true }
gimli = { version = "0.26", optional = true }
more-asserts = "0.2"
dynasm = "1.2.1"
dynasmrt = "1.2.1"
dynasm = "1.2.3"
dynasmrt = "1.2.3"
lazy_static = "1.4"
byteorder = "1.3"
smallvec = "1.6"
Expand Down
28 changes: 8 additions & 20 deletions lib/compiler-singlepass/src/codegen.rs
Original file line number Diff line number Diff line change
Expand Up @@ -3768,11 +3768,8 @@ impl<'a, M: Machine> FuncGen<'a, M> {
}
Operator::Unreachable => {
self.mark_trappable();
let offset = self
.machine
.mark_instruction_with_trap_code(TrapCode::UnreachableCodeReached);
self.machine.emit_illegal_op();
self.machine.mark_instruction_address_end(offset);
self.machine
.emit_illegal_op(TrapCode::UnreachableCodeReached);
self.unreachable_depth = 1;
}
Operator::Return => {
Expand Down Expand Up @@ -5864,36 +5861,27 @@ impl<'a, M: Machine> FuncGen<'a, M> {
self.machine
.emit_label(self.special_labels.integer_division_by_zero);
self.machine
.mark_address_with_trap_code(TrapCode::IntegerDivisionByZero);
self.machine.emit_illegal_op();
.emit_illegal_op(TrapCode::IntegerDivisionByZero);

self.machine
.emit_label(self.special_labels.integer_overflow);
self.machine
.mark_address_with_trap_code(TrapCode::IntegerOverflow);
self.machine.emit_illegal_op();
self.machine.emit_illegal_op(TrapCode::IntegerOverflow);

self.machine.emit_label(self.special_labels.heap_access_oob);
self.machine
.mark_address_with_trap_code(TrapCode::HeapAccessOutOfBounds);
self.machine.emit_illegal_op();
.emit_illegal_op(TrapCode::HeapAccessOutOfBounds);

self.machine
.emit_label(self.special_labels.table_access_oob);
self.machine
.mark_address_with_trap_code(TrapCode::TableAccessOutOfBounds);
self.machine.emit_illegal_op();
.emit_illegal_op(TrapCode::TableAccessOutOfBounds);

self.machine
.emit_label(self.special_labels.indirect_call_null);
self.machine
.mark_address_with_trap_code(TrapCode::IndirectCallToNull);
self.machine.emit_illegal_op();
self.machine.emit_illegal_op(TrapCode::IndirectCallToNull);

self.machine.emit_label(self.special_labels.bad_signature);
self.machine
.mark_address_with_trap_code(TrapCode::BadSignature);
self.machine.emit_illegal_op();
self.machine.emit_illegal_op(TrapCode::BadSignature);

// Notify the assembler backend to generate necessary code at end of function.
self.machine.finalize_function();
Expand Down
6 changes: 3 additions & 3 deletions lib/compiler-singlepass/src/emitter_arm64.rs
Original file line number Diff line number Diff line change
Expand Up @@ -171,7 +171,7 @@ pub trait EmitterARM64 {
fn emit_call_register(&mut self, reg: GPR);
fn emit_ret(&mut self);

fn emit_udf(&mut self);
fn emit_udf(&mut self, payload: u16);
fn emit_dmb(&mut self);
fn emit_brk(&mut self);

Expand Down Expand Up @@ -2016,8 +2016,8 @@ impl EmitterARM64 for Assembler {
dynasm!(self ; ret);
}

fn emit_udf(&mut self) {
dynasm!(self ; udf 0x1234);
fn emit_udf(&mut self, payload: u16) {
dynasm!(self ; udf (payload as u32));
}
fn emit_dmb(&mut self) {
dynasm!(self ; dmb ish);
Expand Down
5 changes: 5 additions & 0 deletions lib/compiler-singlepass/src/emitter_x64.rs
Original file line number Diff line number Diff line change
Expand Up @@ -198,6 +198,7 @@ pub trait EmitterX64 {
fn emit_test_gpr_64(&mut self, reg: GPR);

fn emit_ud2(&mut self);
fn emit_ud1_payload(&mut self, payload: u8);
fn emit_ret(&mut self);
fn emit_call_label(&mut self, label: Label);
fn emit_call_location(&mut self, loc: Location);
Expand Down Expand Up @@ -1853,6 +1854,10 @@ impl EmitterX64 for AssemblerX64 {
fn emit_ud2(&mut self) {
dynasm!(self ; ud2);
}
fn emit_ud1_payload(&mut self, payload: u8) {
assert!(payload & 0xf0 == 0);
dynasm!(self ; ud1 Rd((payload>>3)&1), Rd(payload&7));
}
fn emit_ret(&mut self) {
dynasm!(self ; ret);
}
Expand Down
4 changes: 2 additions & 2 deletions lib/compiler-singlepass/src/machine.rs
Original file line number Diff line number Diff line change
Expand Up @@ -254,8 +254,8 @@ pub trait Machine {
output: Location<Self::GPR, Self::SIMD>,
);

/// emit an Illegal Opcode
fn emit_illegal_op(&mut self);
/// emit an Illegal Opcode, associated with a trapcode
fn emit_illegal_op(&mut self, trp: TrapCode);
/// create a new label
fn get_label(&mut self) -> Label;
/// emit a label
Expand Down
18 changes: 4 additions & 14 deletions lib/compiler-singlepass/src/machine_arm64.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1207,20 +1207,10 @@ impl MachineARM64 {
self.assembler.emit_fcmp(sz, f, f);
self.assembler.emit_bcond_label(Condition::Vs, trap_badconv);
// fallthru: trap_overflow
let offset = self.assembler.get_offset().0;
self.trap_table
.offset_to_code
.insert(offset, TrapCode::IntegerOverflow);
self.emit_illegal_op();
self.mark_instruction_address_end(offset);
self.emit_illegal_op(TrapCode::IntegerOverflow);

self.emit_label(trap_badconv);
let offset = self.assembler.get_offset().0;
self.trap_table
.offset_to_code
.insert(offset, TrapCode::BadConversionToInteger);
self.emit_illegal_op();
self.mark_instruction_address_end(offset);
self.emit_illegal_op(TrapCode::BadConversionToInteger);

self.emit_label(end);
self.restore_fpcr(old_fpcr);
Expand Down Expand Up @@ -2180,8 +2170,8 @@ impl Machine for MachineARM64 {
}
}

fn emit_illegal_op(&mut self) {
self.assembler.emit_udf();
fn emit_illegal_op(&mut self, trap: TrapCode) {
self.assembler.emit_udf(0xc0 | (trap as u8) as u16);
}
fn get_label(&mut self) -> Label {
self.assembler.new_dynamic_label()
Expand Down
43 changes: 18 additions & 25 deletions lib/compiler-singlepass/src/machine_x64.rs
Original file line number Diff line number Diff line change
Expand Up @@ -677,21 +677,12 @@ impl MachineX86_64 {
);

self.emit_label(trap_overflow);
let offset = self.assembler.get_offset().0;
self.trap_table
.offset_to_code
.insert(offset, TrapCode::IntegerOverflow);
self.emit_illegal_op();
self.mark_instruction_address_end(offset);

self.emit_illegal_op(TrapCode::IntegerOverflow);

self.emit_label(trap_badconv);

let offset = self.assembler.get_offset().0;
self.trap_table
.offset_to_code
.insert(offset, TrapCode::BadConversionToInteger);
self.emit_illegal_op();
self.mark_instruction_address_end(offset);
self.emit_illegal_op(TrapCode::BadConversionToInteger);

self.emit_label(end);
}
Expand Down Expand Up @@ -820,20 +811,10 @@ impl MachineX86_64 {
);

self.emit_label(trap_overflow);
let offset = self.assembler.get_offset().0;
self.trap_table
.offset_to_code
.insert(offset, TrapCode::IntegerOverflow);
self.emit_illegal_op();
self.mark_instruction_address_end(offset);
self.emit_illegal_op(TrapCode::IntegerOverflow);

self.emit_label(trap_badconv);
let offset = self.assembler.get_offset().0;
self.trap_table
.offset_to_code
.insert(offset, TrapCode::BadConversionToInteger);
self.emit_illegal_op();
self.mark_instruction_address_end(offset);
self.emit_illegal_op(TrapCode::BadConversionToInteger);

self.emit_label(end);
}
Expand Down Expand Up @@ -2332,8 +2313,20 @@ impl Machine for MachineX86_64 {
self.release_simd(tmp1);
}

fn emit_illegal_op(&mut self) {
fn emit_illegal_op(&mut self, trap: TrapCode) {
// code below is kept as a reference on how to emit illegal op with trap info
// without an Undefined opcode with payload
/*
let offset = self.assembler.get_offset().0;
self.trap_table
.offset_to_code
.insert(offset, trap);
self.assembler.emit_ud2();
self.mark_instruction_address_end(offset);*/
let v = trap as u8;
// payload needs to be between 0-15
// this will emit an 40 0F B9 Cx opcode, with x the payload
self.assembler.emit_ud1_payload(v);
}
fn get_label(&mut self) -> Label {
self.assembler.new_dynamic_label()
Expand Down
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