[ROCm][Perf] gfx950: use aiter.mqa_logits for the sparse indexer prefill

[amd-sriram]

Purpose

On gfx950, the sparse indexer prefill calls the Triton/Gluon fp8_mqa_logits directly, and moving it to another kernel takes a vLLM change each time (#59280 did this for FlyDSL). This calls aiter.mqa_logits (ROCm/aiter#6185) instead: AITER picks the backend and FlyDSL kernel variant per shape from its tuned table.

• gfx950 with AITER enabled: aiter.mqa_logits, when the installed AITER has it.
• Older AITER without aiter.mqa_logits: the existing Triton/Gluon path, unchanged.
• gfx942 keeps the FlyDSL path from [ROCm][Perf] gfx942: use FlyDSL fp8 MQA logits kernel (ROCm/aiter#3913) #49544; other archs and AITER disabled are unchanged.

Needs ROCm/aiter#6185. Until the AITER that vLLM pins includes it, the import fails and gfx950 keeps the Triton/Gluon path, so this is safe to merge first.

Test Plan

• pytest tests/v1/attention/test_rocm_aiter_mqa_logits_dispatch.py: gfx942 uses FlyDSL; gfx950 uses aiter.mqa_logits, or Triton/Gluon when AITER lacks it; other archs use Triton/Gluon; AITER disabled uses the torch fallback.
• A real call of rocm_fp8_mqa_logits on gfx950 (seq_len 2048, seq_len_kv 16384, H=32, D=128), compared with fp8_mqa_logits_torch.

Test Result

MI355X (gfx950), a vLLM 0.30.1rc1 dev build with this change applied to rocm_aiter_mla_sparse.py, AITER from ROCm/aiter#6185, Triton 3.8.0, FlyDSL 0.3.4.1.

• Dispatch test: 5/5 pass.
• Real call: dispatched to aiter.mqa_logits, which used the tuned GLM-5 row (FlyDSL mfma32x32x64_bkv128_r2_w4_lds3). Same -inf mask as the torch fallback, calc_diff 1.4e-6.
• Kernel time on the 24 tuned GLM-5 prefill shapes (from [HIP] [CI] [JIT] Add aiter.mqa_logits with a tuned Triton/FlyDSL table ROCm/aiter#6185): -36.6% geomean against Triton/Gluon (-16.6% to -74.5%), -5.8% against the FlyDSL variant [ROCm][Perf] gfx950: use FlyDSL fp8 MQA logits kernel for the sparse indexer prefill #59280 would pick (-15.4% to +3.3%).
• Not measured end to end yet.

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