Bugfix: use PCP slot mappings for PIECEWISE capture by pisceskkk · Pull Request #53869 · vllm-project/vllm

pisceskkk · 2026-08-26T10:20:48Z

Summary

build PIECEWISE capture slot mappings through PCPManager so dummy attention metadata follows the rank-major PCP layout
cover the PCP2 mixed-batch capture shape with a focused regression test
run both PCP GSM8K end-to-end configurations with PIECEWISE CUDA graphs

Root cause

PIECEWISE capture created a global dummy slot mapping with num_tokens entries. The PCP with TRITON_MLA preparation path consumes a rank-major mapping with pcp_size * num_tokens entries, so mixed capture batches could fail while reshaping the mapping.

For example, the 56-token capture case with PCP2 enters _gather_prefill_cache_inputs() with only 56 slot-mapping entries and fails at:

gathered_slot_mapping.view(pcp_size, local_num_tokens)
RuntimeError: shape '[2, 56]' is invalid for input of size 56

Why the previous PCP PIECEWISE validation did not expose it

The regression coverage added by #53515 exercised PCP batch preparation and dispatch, but did not run the CUDA graph capture input preparation in ModelCudaGraphManager.prepare_inputs_to_capture().

The end-to-end H20 validation also selected FLASH_ATTN_MLA. Its dummy capture batch was classified as pure decode, so the PCP cache-update path returned before the rank-major prefill reshape and masked the undersized mapping. Backends that classify the same dummy batch as mixed prefill/decode reach the reshape and expose the failure.

Cross-GPU reproduction

H100 controlled A/B configuration: GLM-4.7-Flash, TP1 + PCP2 + EP, max_num_seqs=32, max_num_batched_tokens=1024, and PIECEWISE CUDA graphs.

GPU	Attention backend	Result
H100	auto-selected `FLASH_ATTN_MLA`	all 11 capture sizes completed and the service became healthy
H100	forced `TRITON_MLA`	reproduced `shape '[2, 56]' is invalid for input of size 56` during the first graph-memory profiling capture
RTX 5090	auto-selected `TRITON_MLA` with DSV2LiteChat	reproduced the same 56-token reshape failure

Both H100 runs used identical model, parallelism, graph, and kernel-warmup settings; only the attention backend changed. This isolates the trigger to attention-metadata dispatch rather than GPU architecture.

Validation

GSM8K 5-shot accuracy with DSV2LiteChat, TP1 + PCP2, and max_num_seqs=32:

Evaluation set	Eager	PIECEWISE	PIECEWISE vs. eager	Eager invalid	PIECEWISE invalid
32-question gate	20/32 (62.50%)	21/32 (65.63%)	+3.13 pp	0	0
Full 1,319 questions	856/1,319 (64.90%)	843/1,319 (63.91%)	-0.99 pp	3	2

Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com>

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chatgpt-codex-connector · 2026-08-26T14:38:27Z

 max_concurrency: 100
 server_args: >-
-  --enforce-eager
+  --compilation-config '{"cudagraph_mode":"PIECEWISE"}'


Keep sparse-MLA PCP evaluations in eager mode

With nvidia/GLM-5.2-NVFP4, both this PCP4 configuration and the paired PCP2 configuration now fail during server initialization instead of running the evaluation. GLM-5.2 is a sparse-MLA model with index_topk, and PCPManager.validate_config() explicitly raises NotImplementedError whenever sparse MLA combines PCP with any CUDA graph mode other than NONE; setting PIECEWISE therefore makes these evaluation configurations unusable.

Useful? React with 👍 / 👎.

LucasWilkinson · 2026-08-26T21:17:11Z

Could we make the normal path flow a little more linearly by selecting the slot-mapping provider first and calling it once?

slot_mapping_provider = block_tables
if pcp_manager is not None:
    slot_mapping_provider = pcp_manager
slot_mappings = slot_mapping_provider.get_dummy_slot_mappings(num_tokens)

PCPManager.validate_config() already rejects modes with full CUDA graphs, so pcp_manager is not None implies PIECEWISE capture and the not full_cudagraph condition is redundant.

Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com>

pisceskkk · 2026-08-27T00:16:31Z

@LucasWilkinson Updated in d0f3ca79af.

The capture path now selects slot_mapping_provider first and calls get_dummy_slot_mappings() once. When pcp_manager is present, it is used directly, relying on PCPManager.validate_config() for the PIECEWISE-only invariant.

Validation: Ruff check/format, compileall, and git diff --check all pass.

This is agent auto reply.

Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com>

LucasWilkinson

LGTM thanks for fixing!

LucasWilkinson · 2026-08-27T04:00:49Z

/ci run

github-actions · 2026-08-27T04:01:07Z

✅ Triggered Buildkite CI #85747 for commit 647b339a4336.

Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com> Signed-off-by: khushali9 <khushali.desai9@gmail.com>

Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com>

…apture Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com>

Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com>

Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com> Signed-off-by: mikeshawcode <michaelwshaw2@gmail.com>

Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com>

### What this PR does / why we need it This PR upgrades the verified vLLM main anchor from [`ba07e4a48fc951300d97eb506217dd530583dea3`](vllm-project/vllm@ba07e4a) to [`e6bfe03ad73a3330cb427885aa90d97a12e1c704`](vllm-project/vllm@e6bfe03). The exact upstream range is [ba07e4a48...e6bfe03ad](vllm-project/vllm@ba07e4a...e6bfe03). The branch is rebased onto the latest vllm-ascend `origin/main`. The current revision adds two follow-ups on top of the reviewed source mapping: - **`e67948b9c` - drop the local `pr_test.yaml` tweak.** The earlier "raise e2e timeout for `ready-all` partitions" change is reverted, so this PR no longer modifies `.github/workflows/pr_test.yaml`. - **`fe7f550b7` - drop the vLLM `v0.27.1` release lane from the tests.** Every `vllm_version_is("0.27.1")` gate in the unit/e2e suite is removed and each site resolves to the vLLM-main behavior: dual-lane if/else/ternary branches collapse to the main path, the v0.27.1-only skip and the `test_kimi_k3_gqa_mixed_groups_use_expected_physical_layout` test are deleted, the profiling-time and `prepare_inputs` AST contract tests are reshaped to the single main-lane implementation, dead `vllm_version_is` mocks/imports are dropped, the e2e `hunyuan-vl` case always skips, the obsolete `VLLM_VERSION=0.27.1` hack in `test_num_nans` is removed, and the orphaned legacy `_get_kv_cache_config_deepseek_v4` planner is deleted. `vllm_version_is()` stays in `vllm_ascend/utils.py` with its unit test. #### Review conclusion - **Latest revision (`fe7f550b7`):** clean rebase onto current `origin/main`; the two follow-ups above are committed and pushed. Local-only, non-PR working-tree sources are not part of this branch. - **Source review (earlier revisions):** the main2main adaptations for the pinned upstream range were reviewed and are documented below; no PR-introduced source-level blocker was found. - **CI:** the run triggered on the rebased head (`fe7f550b7`) supersedes the earlier run and is the authoritative gate for this revision. #### Upstream changes covered | Upstream PR | Exact commit | Contract adopted here | |---|---|---| | [#50465](vllm-project/vllm#50465) | [`d154d90d6c`](vllm-project/vllm@d154d90) | Batch-sharded sampling and `skip_gather` | | [#51718](vllm-project/vllm#51718) | [`8bdc70ec7b`](vllm-project/vllm@8bdc70e) | Standardized KV-cache layout | | [#52209](vllm-project/vllm#52209) | [`b26039b09f`](vllm-project/vllm@b26039b) | Custom routed-expert weight loading | | [#52560](vllm-project/vllm#52560) | [`2f55ef254c`](vllm-project/vllm@2f55ef2) | Qwen3-Omni DSpark support | | [#52816](vllm-project/vllm#52816) | [`b389ac2946`](vllm-project/vllm@b389ac2) | DFlash2 and DFlash class factories | | [#53183](vllm-project/vllm#53183) | [`4aab2b0ebe`](vllm-project/vllm@4aab2b0) | MRV2 becomes the default runner | | [#53435](vllm-project/vllm#53435) | [`a9a17e7095`](vllm-project/vllm@a9a17e7) | DFlash2 subclass loading fix | | [#53508](vllm-project/vllm#53508) | [`479eeb32d2`](vllm-project/vllm@479eeb3) | Isolated sleep-mode KV allocations | | [#53515](vllm-project/vllm#53515) | [`b1fbbc2ade`](vllm-project/vllm@b1fbbc2) | Persistent PCP graph input buffers | | [#53694](vllm-project/vllm#53694) | [`5acc1c4e4b`](vllm-project/vllm@5acc1c4) | Spec-decode `dp_sync` contract | | [#53869](vllm-project/vllm#53869) | [`b3af042abd`](vllm-project/vllm@b3af042) | PCP slot mappings for PIECEWISE capture | ### Changes by file > Note: the per-file notes below document the reviewed source mapping for the pinned upstream range. Where they describe code as keeping a v0.27.1 lane, the latest revision (`fe7f550b7`) removes the `vllm_version_is("0.27.1")` gates from the unit/e2e tests listed below and deletes the 0.27.1-only coverage; see "What this PR does". #### Repository metadata and CI ##### `.github/vllm-main-verified.commit` 1. Updates the verified vLLM main SHA to `e6bfe03ad73a3330cb427885aa90d97a12e1c704`. - Upstream: [exact compare range](vllm-project/vllm@ba07e4a...e6bfe03). - Review: correct; this is the exact new anchor used by the source and CI review. ##### `.github/workflows/pr_test.yaml` This revision reverts the earlier local e2e-timeout tweak; this PR no longer modifies `.github/workflows/pr_test.yaml`. #### Runtime source ##### `vllm_ascend/_310p/model_runner_310p.py` 1. Adds a version-aware `KVCacheTensor` layer-name accessor and keeps v0.27.1 aliasing while allocating main-lane attention/Mamba buffers per layer. 2. Marks the 310P runner as not supporting the standardized shared backing and derives cache sizes from each layer spec. - Upstream: [#51718](vllm-project/vllm#51718) / [`8bdc70ec7b`](vllm-project/vllm@8bdc70e). - Review: correct; it avoids treating an all-layer descriptor size as one layer's allocation. ##### `vllm_ascend/_310p/worker/v2/model_runner.py` 1. Reads `shared_by` on v0.27.1 and `layers` on main when binding 310P V2 KV tensors. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; the active descriptor field is selected without changing the release-lane behavior. ##### `vllm_ascend/_310p/worker_310p.py` 1. Applies the multi-group KV-memory scaling helper when the runner cannot consume standardized shared backing. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; this prevents per-layer materialization from exceeding the planner's shared-allocation budget. ##### `vllm_ascend/attention/context_parallel/dsa_cp.py` 1. Reads the DeepSeek V4 compression ratio from `compress_ratio` on v0.27.1 or `tokens_per_state` on main. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; both fields encode the same logical ratio in their respective lanes. ##### `vllm_ascend/attention/dsa_v1.py` 1. Applies the same `compress_ratio` / `tokens_per_state` compatibility when building DSA metadata. 2. Retains `AscendDSABackend.get_kv_cache_shape` intentionally: main removed the generic base declaration, but Ascend allocation code still calls the concrete backend helper. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; deleting the concrete helper would break Ascend's own allocator. ##### `vllm_ascend/core/kv_cache_interface.py` 1. Makes `AscendMLAAttentionSpec.storage_block_size` and `merge()` lane-aware for `compress_ratio` versus `tokens_per_state`. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; layout compatibility is compared using the field that exists in each lane. ##### `vllm_ascend/distributed/kv_transfer/kv_p2p/mooncake_connector.py` 1. Replaces direct `shared_by` reads with the version-aware helper. 2. Registers each real per-layer storage when one standardized descriptor represents multiple private Ascend buffers. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; registration uses actual aligned storage addresses instead of assuming descriptor-level aliasing. ##### `vllm_ascend/distributed/kv_transfer/kv_p2p/mooncake_hybrid_connector.py` 1. Uses the version-aware tensor-layer accessor for hybrid Mooncake transfers. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct. ##### `vllm_ascend/distributed/kv_transfer/kv_p2p/mooncake_layerwise_connector.py` 1. Uses the version-aware tensor-layer accessor for layerwise Mooncake transfers. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct. ##### `vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/layerwise_cache_layout.py` 1. Reads layer names through the compatibility helper. 2. Constructs v0.27.1 tensors with `shared_by` and main tensors with `layers`, `layer_stride`, `block_stride`, and `offset`. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; the produced descriptor is valid in both dataclass versions. ##### `vllm_ascend/distributed/kv_transfer/kv_pool/kv_offload/native/offloading_connector.py` 1. Removes the deleted `is_kv_cache_tensor_packed` import/call and uses `bool(block_stride)` on main. 2. Replaces `shared_by` with the version-aware layer accessor. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; this resolves both introduced P1 import/call findings while preserving the old packed-layout meaning. ##### `vllm_ascend/distributed/kv_transfer/kv_pool/recompute_cpu_offload/manager.py` 1. Uses the version-aware layer accessor when building recompute offload metadata. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct. ##### `vllm_ascend/distributed/kv_transfer/kv_pool/recompute_cpu_offload/worker.py` 1. Preserves new descriptor geometry (`layers`, strides, offset) on main and old `shared_by` construction on v0.27.1. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; reconstructed tensors retain the layout information required by main. ##### `vllm_ascend/models/deepseek_v4/indexer.py` 1. Constructs `AscendMLAAttentionSpec` with `compress_ratio` on v0.27.1 and `tokens_per_state` on main. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct. ##### `vllm_ascend/models/layer/attention/layer.py` 1. Applies the same lane-specific MLA spec field when attention layers publish their KV-cache specs. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct. ##### `vllm_ascend/models/qwen3_dflash2.py` 1. Declares `decoder_layer_cls` and `model_cls` for the new upstream factory-based construction path. 2. Retains the module-global swap only for v0.27.1, where the factories do not exist. - Upstream: [#52816](vllm-project/vllm#52816) / [`b389ac2946`](vllm-project/vllm@b389ac2), finalized by [#53435](vllm-project/vllm#53435) / [`a9a17e7095`](vllm-project/vllm@a9a17e7). - Review: correct; each lane instantiates `DFlash2Qwen3DecoderLayer` and `DFlash2Qwen3Model` through its native mechanism. ##### `vllm_ascend/ops/vocab_parallel_embedding.py` 1. Adds the new `skip_gather` argument and mirrors the upstream early return before tensor-parallel gather. - Upstream: [#50465](vllm-project/vllm#50465) / [`d154d90d6c`](vllm-project/vllm@d154d90). - Review: correct; the trailing default keeps the old call contract valid. ##### `vllm_ascend/patch/platform/patch_fused_moe.py` 1. Composes an upstream custom `RoutedExperts` subclass with `AscendRoutedExperts` instead of replacing the class by name. 2. Preserves the upstream subclass's custom loader while retaining Ascend routing/EPLB behavior. - Upstream: [#52209](vllm-project/vllm#52209) / [`b26039b09f`](vllm-project/vllm@b26039b). - Review: correct; it adapts the actual factory return type and avoids bypassing new upstream loading behavior. ##### `vllm_ascend/patch/platform/patch_kv_cache_utils.py` 1. Constructs lane-correct `KVCacheTensor` descriptors and inlines page-size calculation removed from the old patch target. 2. Replaces the removed `_get_kv_cache_config_packed` hook on main with patches for `get_kv_cache_config_from_groups`, `_max_memory_usage_bytes_from_groups`, and `_pool_bytes_per_block`. 3. Preserves DeepSeek V4 shared tuples and rank-consistent KV block planning. - Upstream: [#51718](vllm-project/vllm#51718) / [`8bdc70ec7b`](vllm-project/vllm@8bdc70e). - Review: correct; this resolves the introduced P0 removed-target finding against the live main entry points. ##### `vllm_ascend/patch/platform/patch_use_v2_model_runner.py` 1. Removes DSpark and DFlash2 from Ascend's V1-only unsupported-feature result when the upstream helper exists. - Upstream: MRV2 default switch [#53183](vllm-project/vllm#53183), with DSpark from [#52560](vllm-project/vllm#52560) and DFlash2 from [#52816](vllm-project/vllm#52816). - Review: correct; the filter is narrow and does not change other unsupported features. ##### `vllm_ascend/patch/worker/patch_v2/patch_attn_utils.py` 1. Keeps the legacy `_allocate_kv_cache` / `_reshape_kv_cache` patches only on v0.27.1. 2. Patches main's live `allocate_kv_cache` entry point with `allocate_kv_cache_main` and retains Ascend reshape binding. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; this resolves the removed-import and removed-monkey-patch-target P0/P1 findings. ##### `vllm_ascend/utils.py` 1. Adds `get_kv_cache_tensor_layers()` to normalize `shared_by` and `layers` reads. - Upstream: [#51718](vllm-project/vllm#51718). 2. Strips a PEP 440 local suffix (for example `+empty`) before `vllm_version_is()` comparison. - Upstream: no direct upstream patch; downstream compatibility hardening needed for release-lane version strings. - Review: correct; the comparison changes only local build metadata handling. ##### `vllm_ascend/worker/model_runner_v1.py` 1. Implements lane-correct KV descriptor reads and advertises support for standardized shared backing. 2. On main, overlays compatible attention/Mamba groups in one backing store and exposes descriptor-offset views; otherwise materializes correctly sized private per-layer buffers. 3. Preserves v0.27.1 aliasing, SFA/indexer layouts, sparse/offload paths, cache-only caches, and page-padding geometry. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; the allocation follows the new descriptor geometry without changing the release-lane memory model. ##### `vllm_ascend/worker/v2/aclgraph_utils.py` 1. Keeps old-lane dummy-batch repartitioning but consumes already-local persistent buffers on main. 2. Uses PCP dummy block tables and slot mappings and forwards `pcp_manager` through graph capture. - Upstream: persistent buffers [#53515](vllm-project/vllm#53515) and capture slot mappings [#53869](vllm-project/vllm#53869). - Review: correct; main no longer repartitions an already rank-local capture batch. ##### `vllm_ascend/worker/v2/attn_utils.py` 1. Removes main-lane dependence on the deleted `indexes_kv_by_block_stride` marker and uses standardized page geometry. 2. Allocates one hybrid backing on main, then creates per-layer views from `offset`, `layer_stride`, and `block_stride`; private SFA/attention allocations are retained where sharing is invalid. 3. Adds `allocate_kv_cache_main`, reconstructs Ascend attention groups, and binds the live upstream allocation entry point. 4. Retains calls to concrete Ascend `get_kv_cache_shape` helpers because Ascend still needs backend-specific views after the generic base method was removed. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; the three machine-reported calls are intentional concrete-backend calls, not calls to the removed base implementation. ##### `vllm_ascend/worker/v2/model_runner.py` 1. Advertises standardized shared KV backing and keeps separate `prepare_inputs` implementations for the two upstream signatures. 2. Preserves the larger of real PCP tokens and graph-descriptor padding; main forwards `padded_num_tokens` to the PCP manager. - Upstream: KV layout [#51718](vllm-project/vllm#51718), persistent PCP buffers [#53515](vllm-project/vllm#53515), and capture mappings [#53869](vllm-project/vllm#53869). - Review: correct; runtime PCP tokens are not truncated to the graph descriptor. ##### `vllm_ascend/worker/v2/pcp_manager.py` 1. Matches the optional constructor/partition keywords exposed by each lane. 2. Uses persistent `AscendInputBuffers`, including the `max_num_reqs + 1` query-offset view required by prefix sums. 3. Preserves explicit graph padding in the main-lane local batch. - Upstream: [#53515](vllm-project/vllm#53515) and [#53869](vllm-project/vllm#53869). - Review: correct; buffer lifetime, shape, and padding match the new PCP capture contract. ##### `vllm_ascend/worker/v2/spec_decode/autoregressive/speculator.py` 1. Accepts `dp_sync`, forwards `num_tokens_across_dp` on v0.27.1, and forwards `dp_sync` on main. - Upstream: [#53694](vllm-project/vllm#53694) / [`5acc1c4e4b`](vllm-project/vllm@5acc1c4). - Review: correct. ##### `vllm_ascend/worker/v2/spec_decode/dflash/speculator.py` 1. Applies the same lane-specific `num_tokens_across_dp` / `dp_sync` forwarding in DFlash. - Upstream: [#53694](vllm-project/vllm#53694). - Review: correct. ##### `vllm_ascend/worker/v2/spec_decode/dspark/speculator.py` 1. Applies the same lane-specific `num_tokens_across_dp` / `dp_sync` forwarding in DSpark. - Upstream: [#53694](vllm-project/vllm#53694). - Review: correct. ##### `vllm_ascend/worker/worker.py` 1. Guards the removed `post_kv_cache_wake_up` hook with `hasattr`. - Upstream: [#53508](vllm-project/vllm#53508) / [`479eeb32d2`](vllm-project/vllm@479eeb3). 2. Scales multi-group KV memory only when Ascend must materialize private buffers; skips DeepSeek V4 custom planning and compatible standardized hybrid sharing. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; it prevents OOM without reducing capacity for runners that can consume the shared layout. #### Unit tests ##### `tests/ut/_310p/test_model_runner_310p.py` 1. Verifies that the 310P runner does not advertise standardized shared KV backing. - Upstream coverage: [#51718](vllm-project/vllm#51718). ##### `tests/ut/_310p/test_model_runner_v2_310p.py` 1. Makes the descriptor fixture valid with `shared_by` on v0.27.1 and `layers` on main. - Upstream coverage: [#51718](vllm-project/vllm#51718). ##### `tests/ut/attention/test_dsa_v1.py` 1. Covers both `compress_ratio` and `tokens_per_state` metadata inputs. - Upstream coverage: [#51718](vllm-project/vllm#51718). ##### `tests/ut/core/test_recompute_scheduler.py` 1. Constructs base MLA specs with the ratio field available in the active lane. - Upstream coverage: [#51718](vllm-project/vllm#51718). ##### `tests/ut/distributed/ascend_store/test_layerwise_cache_layout.py` 1. Adds a lane-aware `KVCacheTensor` fixture and validates layout reads through the compatibility helper. 2. Covers main descriptor strides/offsets and packed-descriptor rejection. - Upstream coverage: [#51718](vllm-project/vllm#51718). ##### `tests/ut/kv_offload/test_mooncake_connector.py` 1. Adapts fixtures/assertions to standardized descriptors and main group-allocation sizes. 2. Adds coverage for registering multiple private per-layer storages represented by one descriptor. - Upstream coverage: [#51718](vllm-project/vllm#51718). ##### `tests/ut/patch/platform/test_patch_fused_moe.py` 1. Verifies composition of a custom upstream routed-expert subclass with the Ascend contract and loader preservation. - Upstream coverage: [#52209](vllm-project/vllm#52209). ##### `tests/ut/patch/platform/test_patch_use_v2_model_runner.py` 1. Verifies that only DSpark and DFlash2 are removed from the V1-only unsupported list. - Upstream coverage: [#53183](vllm-project/vllm#53183), [#52560](vllm-project/vllm#52560), and [#52816](vllm-project/vllm#52816). ##### `tests/ut/patch/platform/test_prefix_cache_cp_patches.py` 1. Adapts standardized KV descriptor fixtures. 2. Covers DeepSeek V4 shared-tuple capacity and rank-consistent replanning. - Upstream coverage: [#51718](vllm-project/vllm#51718). ##### `tests/ut/spec_decode/test_dflash2_proposer.py` 1. Verifies DFlash2's `decoder_layer_cls` and `model_cls` declarations. - Upstream coverage: [#52816](vllm-project/vllm#52816) and [#53435](vllm-project/vllm#53435). ##### `tests/ut/test_compressed_prefix_cache.py` 1. Constructs compressed-prefix MLA specs with the lane-specific ratio field. - Upstream coverage: [#51718](vllm-project/vllm#51718). ##### `tests/ut/tools/bisect/test_version_compat.py` 1. Isolates `VLLM_VERSION` environment state so one compatibility test cannot leak its lane into another. - Upstream coverage: no direct source patch; downstream test isolation for the two-lane compatibility logic. ##### `tests/ut/worker/a2/test_model_runner_v1.py` 1. Covers standardized descriptor allocation, per-layer views, shared capacity, and cache-only behavior. - Upstream coverage: [#51718](vllm-project/vllm#51718). ##### `tests/ut/worker/a2/test_model_runner_v1_with_device.py` 1. Adapts device-backed V1 fixtures to `shared_by` / `layers` and validates main-lane geometry. - Upstream coverage: [#51718](vllm-project/vllm#51718). ##### `tests/ut/worker/a2/test_worker_v1.py` 1. Covers shared-layout capacity versus private-buffer budget scaling. 2. Covers the optional wake hook after sleep-mode KV allocation changes. - Upstream coverage: [#51718](vllm-project/vllm#51718) and [#53508](vllm-project/vllm#53508). ##### `tests/ut/worker/test_attn_utils_v2.py` 1. Covers the main `allocate_kv_cache` entry point, new descriptor geometry, MLA ratio field, and flat attention-group reshape contract. - Upstream coverage: [#51718](vllm-project/vllm#51718). ##### `tests/ut/worker/test_model_runner_v2.py` 1. Verifies both prepare-input implementations preserve real PCP tokens and only main forwards graph padding. - Upstream coverage: [#53515](vllm-project/vllm#53515) and [#53869](vllm-project/vllm#53869). ##### `tests/ut/worker/test_model_runner_v2_finegrained_tp.py` 1. Adds `batch_sharder` and request-count fields to the bare fixture to match the new sampling contract. - Upstream coverage: [#50465](vllm-project/vllm#50465). ##### `tests/ut/worker/test_model_runner_v2_mamba.py` 1. Adds lane-aware descriptors and validates one main-lane hybrid backing with per-layer offsets. 2. Covers the removal of `indexes_kv_by_block_stride` through observable page-padding geometry. - Upstream coverage: [#51718](vllm-project/vllm#51718). ##### `tests/ut/worker/test_pcp_manager_v2.py` 1. Covers persistent Ascend input buffers, prefix-sum offset shape, padded local batches, main capture slot mappings, and old/new keyword signatures. 2. Verifies `dp_sync` on all three Ascend speculators and `pcp_manager` on graph capture. - Upstream coverage: [#53515](vllm-project/vllm#53515), [#53694](vllm-project/vllm#53694), and [#53869](vllm-project/vllm#53869). ### Does this PR introduce any user-facing change? No. This is an internal compatibility update; it does not add an Ascend-specific public API. ### How was this patch tested? - Exact-contract main2main validation and range prediction for vLLM [`ba07e4a48...e6bfe03ad`](vllm-project/vllm@ba07e4a...e6bfe03). - GitHub Actions: [run 33229439657](https://github.com/vllm-project/vllm-ascend/actions/runs/33229439657). - Successful in that run: pre-commit, both 310P jobs, all A3 jobs, and the passing A2 shards on both `e6bfe03ad...` and `v0.27.1`. - Pending rerun: ModelScope HTTP 500 failures on A2; two unchanged EPLB CPU tests fail identically on both lanes. - vLLM main: vllm-project/vllm@ba07e4a --------- Signed-off-by: liaoqidan <1107297340@qq.com> Signed-off-by: shenzhao <shenzhao9@huawei.com> Signed-off-by: LQDLove <LQDLove@users.noreply.github.com> Co-authored-by: shenzhao <shenzhao9@huawei.com> Co-authored-by: LQDLove <LQDLove@users.noreply.github.com>

Squash the validated upstream PR series into one provenance commit. Use rank-local PCP slot mappings during PIECEWISE graph capture and make the capture-slot provider contract explicit and type-safe.

Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com>

### What this PR does / why we need it This PR upgrades the verified vLLM main anchor from [`ba07e4a48fc951300d97eb506217dd530583dea3`](vllm-project/vllm@ba07e4a) to [`e6bfe03ad73a3330cb427885aa90d97a12e1c704`](vllm-project/vllm@e6bfe03). The exact upstream range is [ba07e4a48...e6bfe03ad](vllm-project/vllm@ba07e4a...e6bfe03). The branch is rebased onto the latest vllm-ascend `origin/main`. The current revision adds two follow-ups on top of the reviewed source mapping: - **`e67948b9c` - drop the local `pr_test.yaml` tweak.** The earlier "raise e2e timeout for `ready-all` partitions" change is reverted, so this PR no longer modifies `.github/workflows/pr_test.yaml`. - **`fe7f550b7` - drop the vLLM `v0.27.1` release lane from the tests.** Every `vllm_version_is("0.27.1")` gate in the unit/e2e suite is removed and each site resolves to the vLLM-main behavior: dual-lane if/else/ternary branches collapse to the main path, the v0.27.1-only skip and the `test_kimi_k3_gqa_mixed_groups_use_expected_physical_layout` test are deleted, the profiling-time and `prepare_inputs` AST contract tests are reshaped to the single main-lane implementation, dead `vllm_version_is` mocks/imports are dropped, the e2e `hunyuan-vl` case always skips, the obsolete `VLLM_VERSION=0.27.1` hack in `test_num_nans` is removed, and the orphaned legacy `_get_kv_cache_config_deepseek_v4` planner is deleted. `vllm_version_is()` stays in `vllm_ascend/utils.py` with its unit test. #### Review conclusion - **Latest revision (`fe7f550b7`):** clean rebase onto current `origin/main`; the two follow-ups above are committed and pushed. Local-only, non-PR working-tree sources are not part of this branch. - **Source review (earlier revisions):** the main2main adaptations for the pinned upstream range were reviewed and are documented below; no PR-introduced source-level blocker was found. - **CI:** the run triggered on the rebased head (`fe7f550b7`) supersedes the earlier run and is the authoritative gate for this revision. #### Upstream changes covered | Upstream PR | Exact commit | Contract adopted here | |---|---|---| | [#50465](vllm-project/vllm#50465) | [`d154d90d6c`](vllm-project/vllm@d154d90) | Batch-sharded sampling and `skip_gather` | | [#51718](vllm-project/vllm#51718) | [`8bdc70ec7b`](vllm-project/vllm@8bdc70e) | Standardized KV-cache layout | | [#52209](vllm-project/vllm#52209) | [`b26039b09f`](vllm-project/vllm@b26039b) | Custom routed-expert weight loading | | [#52560](vllm-project/vllm#52560) | [`2f55ef254c`](vllm-project/vllm@2f55ef2) | Qwen3-Omni DSpark support | | [#52816](vllm-project/vllm#52816) | [`b389ac2946`](vllm-project/vllm@b389ac2) | DFlash2 and DFlash class factories | | [#53183](vllm-project/vllm#53183) | [`4aab2b0ebe`](vllm-project/vllm@4aab2b0) | MRV2 becomes the default runner | | [#53435](vllm-project/vllm#53435) | [`a9a17e7095`](vllm-project/vllm@a9a17e7) | DFlash2 subclass loading fix | | [#53508](vllm-project/vllm#53508) | [`479eeb32d2`](vllm-project/vllm@479eeb3) | Isolated sleep-mode KV allocations | | [#53515](vllm-project/vllm#53515) | [`b1fbbc2ade`](vllm-project/vllm@b1fbbc2) | Persistent PCP graph input buffers | | [#53694](vllm-project/vllm#53694) | [`5acc1c4e4b`](vllm-project/vllm@5acc1c4) | Spec-decode `dp_sync` contract | | [#53869](vllm-project/vllm#53869) | [`b3af042abd`](vllm-project/vllm@b3af042) | PCP slot mappings for PIECEWISE capture | ### Changes by file > Note: the per-file notes below document the reviewed source mapping for the pinned upstream range. Where they describe code as keeping a v0.27.1 lane, the latest revision (`fe7f550b7`) removes the `vllm_version_is("0.27.1")` gates from the unit/e2e tests listed below and deletes the 0.27.1-only coverage; see "What this PR does". #### Repository metadata and CI ##### `.github/vllm-main-verified.commit` 1. Updates the verified vLLM main SHA to `e6bfe03ad73a3330cb427885aa90d97a12e1c704`. - Upstream: [exact compare range](vllm-project/vllm@ba07e4a...e6bfe03). - Review: correct; this is the exact new anchor used by the source and CI review. ##### `.github/workflows/pr_test.yaml` This revision reverts the earlier local e2e-timeout tweak; this PR no longer modifies `.github/workflows/pr_test.yaml`. #### Runtime source ##### `vllm_ascend/_310p/model_runner_310p.py` 1. Adds a version-aware `KVCacheTensor` layer-name accessor and keeps v0.27.1 aliasing while allocating main-lane attention/Mamba buffers per layer. 2. Marks the 310P runner as not supporting the standardized shared backing and derives cache sizes from each layer spec. - Upstream: [#51718](vllm-project/vllm#51718) / [`8bdc70ec7b`](vllm-project/vllm@8bdc70e). - Review: correct; it avoids treating an all-layer descriptor size as one layer's allocation. ##### `vllm_ascend/_310p/worker/v2/model_runner.py` 1. Reads `shared_by` on v0.27.1 and `layers` on main when binding 310P V2 KV tensors. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; the active descriptor field is selected without changing the release-lane behavior. ##### `vllm_ascend/_310p/worker_310p.py` 1. Applies the multi-group KV-memory scaling helper when the runner cannot consume standardized shared backing. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; this prevents per-layer materialization from exceeding the planner's shared-allocation budget. ##### `vllm_ascend/attention/context_parallel/dsa_cp.py` 1. Reads the DeepSeek V4 compression ratio from `compress_ratio` on v0.27.1 or `tokens_per_state` on main. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; both fields encode the same logical ratio in their respective lanes. ##### `vllm_ascend/attention/dsa_v1.py` 1. Applies the same `compress_ratio` / `tokens_per_state` compatibility when building DSA metadata. 2. Retains `AscendDSABackend.get_kv_cache_shape` intentionally: main removed the generic base declaration, but Ascend allocation code still calls the concrete backend helper. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; deleting the concrete helper would break Ascend's own allocator. ##### `vllm_ascend/core/kv_cache_interface.py` 1. Makes `AscendMLAAttentionSpec.storage_block_size` and `merge()` lane-aware for `compress_ratio` versus `tokens_per_state`. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; layout compatibility is compared using the field that exists in each lane. ##### `vllm_ascend/distributed/kv_transfer/kv_p2p/mooncake_connector.py` 1. Replaces direct `shared_by` reads with the version-aware helper. 2. Registers each real per-layer storage when one standardized descriptor represents multiple private Ascend buffers. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; registration uses actual aligned storage addresses instead of assuming descriptor-level aliasing. ##### `vllm_ascend/distributed/kv_transfer/kv_p2p/mooncake_hybrid_connector.py` 1. Uses the version-aware tensor-layer accessor for hybrid Mooncake transfers. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct. ##### `vllm_ascend/distributed/kv_transfer/kv_p2p/mooncake_layerwise_connector.py` 1. Uses the version-aware tensor-layer accessor for layerwise Mooncake transfers. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct. ##### `vllm_ascend/distributed/kv_transfer/kv_pool/ascend_store/layerwise_cache_layout.py` 1. Reads layer names through the compatibility helper. 2. Constructs v0.27.1 tensors with `shared_by` and main tensors with `layers`, `layer_stride`, `block_stride`, and `offset`. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; the produced descriptor is valid in both dataclass versions. ##### `vllm_ascend/distributed/kv_transfer/kv_pool/kv_offload/native/offloading_connector.py` 1. Removes the deleted `is_kv_cache_tensor_packed` import/call and uses `bool(block_stride)` on main. 2. Replaces `shared_by` with the version-aware layer accessor. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; this resolves both introduced P1 import/call findings while preserving the old packed-layout meaning. ##### `vllm_ascend/distributed/kv_transfer/kv_pool/recompute_cpu_offload/manager.py` 1. Uses the version-aware layer accessor when building recompute offload metadata. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct. ##### `vllm_ascend/distributed/kv_transfer/kv_pool/recompute_cpu_offload/worker.py` 1. Preserves new descriptor geometry (`layers`, strides, offset) on main and old `shared_by` construction on v0.27.1. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; reconstructed tensors retain the layout information required by main. ##### `vllm_ascend/models/deepseek_v4/indexer.py` 1. Constructs `AscendMLAAttentionSpec` with `compress_ratio` on v0.27.1 and `tokens_per_state` on main. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct. ##### `vllm_ascend/models/layer/attention/layer.py` 1. Applies the same lane-specific MLA spec field when attention layers publish their KV-cache specs. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct. ##### `vllm_ascend/models/qwen3_dflash2.py` 1. Declares `decoder_layer_cls` and `model_cls` for the new upstream factory-based construction path. 2. Retains the module-global swap only for v0.27.1, where the factories do not exist. - Upstream: [#52816](vllm-project/vllm#52816) / [`b389ac2946`](vllm-project/vllm@b389ac2), finalized by [#53435](vllm-project/vllm#53435) / [`a9a17e7095`](vllm-project/vllm@a9a17e7). - Review: correct; each lane instantiates `DFlash2Qwen3DecoderLayer` and `DFlash2Qwen3Model` through its native mechanism. ##### `vllm_ascend/ops/vocab_parallel_embedding.py` 1. Adds the new `skip_gather` argument and mirrors the upstream early return before tensor-parallel gather. - Upstream: [#50465](vllm-project/vllm#50465) / [`d154d90d6c`](vllm-project/vllm@d154d90). - Review: correct; the trailing default keeps the old call contract valid. ##### `vllm_ascend/patch/platform/patch_fused_moe.py` 1. Composes an upstream custom `RoutedExperts` subclass with `AscendRoutedExperts` instead of replacing the class by name. 2. Preserves the upstream subclass's custom loader while retaining Ascend routing/EPLB behavior. - Upstream: [#52209](vllm-project/vllm#52209) / [`b26039b09f`](vllm-project/vllm@b26039b). - Review: correct; it adapts the actual factory return type and avoids bypassing new upstream loading behavior. ##### `vllm_ascend/patch/platform/patch_kv_cache_utils.py` 1. Constructs lane-correct `KVCacheTensor` descriptors and inlines page-size calculation removed from the old patch target. 2. Replaces the removed `_get_kv_cache_config_packed` hook on main with patches for `get_kv_cache_config_from_groups`, `_max_memory_usage_bytes_from_groups`, and `_pool_bytes_per_block`. 3. Preserves DeepSeek V4 shared tuples and rank-consistent KV block planning. - Upstream: [#51718](vllm-project/vllm#51718) / [`8bdc70ec7b`](vllm-project/vllm@8bdc70e). - Review: correct; this resolves the introduced P0 removed-target finding against the live main entry points. ##### `vllm_ascend/patch/platform/patch_use_v2_model_runner.py` 1. Removes DSpark and DFlash2 from Ascend's V1-only unsupported-feature result when the upstream helper exists. - Upstream: MRV2 default switch [#53183](vllm-project/vllm#53183), with DSpark from [#52560](vllm-project/vllm#52560) and DFlash2 from [#52816](vllm-project/vllm#52816). - Review: correct; the filter is narrow and does not change other unsupported features. ##### `vllm_ascend/patch/worker/patch_v2/patch_attn_utils.py` 1. Keeps the legacy `_allocate_kv_cache` / `_reshape_kv_cache` patches only on v0.27.1. 2. Patches main's live `allocate_kv_cache` entry point with `allocate_kv_cache_main` and retains Ascend reshape binding. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; this resolves the removed-import and removed-monkey-patch-target P0/P1 findings. ##### `vllm_ascend/utils.py` 1. Adds `get_kv_cache_tensor_layers()` to normalize `shared_by` and `layers` reads. - Upstream: [#51718](vllm-project/vllm#51718). 2. Strips a PEP 440 local suffix (for example `+empty`) before `vllm_version_is()` comparison. - Upstream: no direct upstream patch; downstream compatibility hardening needed for release-lane version strings. - Review: correct; the comparison changes only local build metadata handling. ##### `vllm_ascend/worker/model_runner_v1.py` 1. Implements lane-correct KV descriptor reads and advertises support for standardized shared backing. 2. On main, overlays compatible attention/Mamba groups in one backing store and exposes descriptor-offset views; otherwise materializes correctly sized private per-layer buffers. 3. Preserves v0.27.1 aliasing, SFA/indexer layouts, sparse/offload paths, cache-only caches, and page-padding geometry. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; the allocation follows the new descriptor geometry without changing the release-lane memory model. ##### `vllm_ascend/worker/v2/aclgraph_utils.py` 1. Keeps old-lane dummy-batch repartitioning but consumes already-local persistent buffers on main. 2. Uses PCP dummy block tables and slot mappings and forwards `pcp_manager` through graph capture. - Upstream: persistent buffers [#53515](vllm-project/vllm#53515) and capture slot mappings [#53869](vllm-project/vllm#53869). - Review: correct; main no longer repartitions an already rank-local capture batch. ##### `vllm_ascend/worker/v2/attn_utils.py` 1. Removes main-lane dependence on the deleted `indexes_kv_by_block_stride` marker and uses standardized page geometry. 2. Allocates one hybrid backing on main, then creates per-layer views from `offset`, `layer_stride`, and `block_stride`; private SFA/attention allocations are retained where sharing is invalid. 3. Adds `allocate_kv_cache_main`, reconstructs Ascend attention groups, and binds the live upstream allocation entry point. 4. Retains calls to concrete Ascend `get_kv_cache_shape` helpers because Ascend still needs backend-specific views after the generic base method was removed. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; the three machine-reported calls are intentional concrete-backend calls, not calls to the removed base implementation. ##### `vllm_ascend/worker/v2/model_runner.py` 1. Advertises standardized shared KV backing and keeps separate `prepare_inputs` implementations for the two upstream signatures. 2. Preserves the larger of real PCP tokens and graph-descriptor padding; main forwards `padded_num_tokens` to the PCP manager. - Upstream: KV layout [#51718](vllm-project/vllm#51718), persistent PCP buffers [#53515](vllm-project/vllm#53515), and capture mappings [#53869](vllm-project/vllm#53869). - Review: correct; runtime PCP tokens are not truncated to the graph descriptor. ##### `vllm_ascend/worker/v2/pcp_manager.py` 1. Matches the optional constructor/partition keywords exposed by each lane. 2. Uses persistent `AscendInputBuffers`, including the `max_num_reqs + 1` query-offset view required by prefix sums. 3. Preserves explicit graph padding in the main-lane local batch. - Upstream: [#53515](vllm-project/vllm#53515) and [#53869](vllm-project/vllm#53869). - Review: correct; buffer lifetime, shape, and padding match the new PCP capture contract. ##### `vllm_ascend/worker/v2/spec_decode/autoregressive/speculator.py` 1. Accepts `dp_sync`, forwards `num_tokens_across_dp` on v0.27.1, and forwards `dp_sync` on main. - Upstream: [#53694](vllm-project/vllm#53694) / [`5acc1c4e4b`](vllm-project/vllm@5acc1c4). - Review: correct. ##### `vllm_ascend/worker/v2/spec_decode/dflash/speculator.py` 1. Applies the same lane-specific `num_tokens_across_dp` / `dp_sync` forwarding in DFlash. - Upstream: [#53694](vllm-project/vllm#53694). - Review: correct. ##### `vllm_ascend/worker/v2/spec_decode/dspark/speculator.py` 1. Applies the same lane-specific `num_tokens_across_dp` / `dp_sync` forwarding in DSpark. - Upstream: [#53694](vllm-project/vllm#53694). - Review: correct. ##### `vllm_ascend/worker/worker.py` 1. Guards the removed `post_kv_cache_wake_up` hook with `hasattr`. - Upstream: [#53508](vllm-project/vllm#53508) / [`479eeb32d2`](vllm-project/vllm@479eeb3). 2. Scales multi-group KV memory only when Ascend must materialize private buffers; skips DeepSeek V4 custom planning and compatible standardized hybrid sharing. - Upstream: [#51718](vllm-project/vllm#51718). - Review: correct; it prevents OOM without reducing capacity for runners that can consume the shared layout. #### Unit tests ##### `tests/ut/_310p/test_model_runner_310p.py` 1. Verifies that the 310P runner does not advertise standardized shared KV backing. - Upstream coverage: [#51718](vllm-project/vllm#51718). ##### `tests/ut/_310p/test_model_runner_v2_310p.py` 1. Makes the descriptor fixture valid with `shared_by` on v0.27.1 and `layers` on main. - Upstream coverage: [#51718](vllm-project/vllm#51718). ##### `tests/ut/attention/test_dsa_v1.py` 1. Covers both `compress_ratio` and `tokens_per_state` metadata inputs. - Upstream coverage: [#51718](vllm-project/vllm#51718). ##### `tests/ut/core/test_recompute_scheduler.py` 1. Constructs base MLA specs with the ratio field available in the active lane. - Upstream coverage: [#51718](vllm-project/vllm#51718). ##### `tests/ut/distributed/ascend_store/test_layerwise_cache_layout.py` 1. Adds a lane-aware `KVCacheTensor` fixture and validates layout reads through the compatibility helper. 2. Covers main descriptor strides/offsets and packed-descriptor rejection. - Upstream coverage: [#51718](vllm-project/vllm#51718). ##### `tests/ut/kv_offload/test_mooncake_connector.py` 1. Adapts fixtures/assertions to standardized descriptors and main group-allocation sizes. 2. Adds coverage for registering multiple private per-layer storages represented by one descriptor. - Upstream coverage: [#51718](vllm-project/vllm#51718). ##### `tests/ut/patch/platform/test_patch_fused_moe.py` 1. Verifies composition of a custom upstream routed-expert subclass with the Ascend contract and loader preservation. - Upstream coverage: [#52209](vllm-project/vllm#52209). ##### `tests/ut/patch/platform/test_patch_use_v2_model_runner.py` 1. Verifies that only DSpark and DFlash2 are removed from the V1-only unsupported list. - Upstream coverage: [#53183](vllm-project/vllm#53183), [#52560](vllm-project/vllm#52560), and [#52816](vllm-project/vllm#52816). ##### `tests/ut/patch/platform/test_prefix_cache_cp_patches.py` 1. Adapts standardized KV descriptor fixtures. 2. Covers DeepSeek V4 shared-tuple capacity and rank-consistent replanning. - Upstream coverage: [#51718](vllm-project/vllm#51718). ##### `tests/ut/spec_decode/test_dflash2_proposer.py` 1. Verifies DFlash2's `decoder_layer_cls` and `model_cls` declarations. - Upstream coverage: [#52816](vllm-project/vllm#52816) and [#53435](vllm-project/vllm#53435). ##### `tests/ut/test_compressed_prefix_cache.py` 1. Constructs compressed-prefix MLA specs with the lane-specific ratio field. - Upstream coverage: [#51718](vllm-project/vllm#51718). ##### `tests/ut/tools/bisect/test_version_compat.py` 1. Isolates `VLLM_VERSION` environment state so one compatibility test cannot leak its lane into another. - Upstream coverage: no direct source patch; downstream test isolation for the two-lane compatibility logic. ##### `tests/ut/worker/a2/test_model_runner_v1.py` 1. Covers standardized descriptor allocation, per-layer views, shared capacity, and cache-only behavior. - Upstream coverage: [#51718](vllm-project/vllm#51718). ##### `tests/ut/worker/a2/test_model_runner_v1_with_device.py` 1. Adapts device-backed V1 fixtures to `shared_by` / `layers` and validates main-lane geometry. - Upstream coverage: [#51718](vllm-project/vllm#51718). ##### `tests/ut/worker/a2/test_worker_v1.py` 1. Covers shared-layout capacity versus private-buffer budget scaling. 2. Covers the optional wake hook after sleep-mode KV allocation changes. - Upstream coverage: [#51718](vllm-project/vllm#51718) and [#53508](vllm-project/vllm#53508). ##### `tests/ut/worker/test_attn_utils_v2.py` 1. Covers the main `allocate_kv_cache` entry point, new descriptor geometry, MLA ratio field, and flat attention-group reshape contract. - Upstream coverage: [#51718](vllm-project/vllm#51718). ##### `tests/ut/worker/test_model_runner_v2.py` 1. Verifies both prepare-input implementations preserve real PCP tokens and only main forwards graph padding. - Upstream coverage: [#53515](vllm-project/vllm#53515) and [#53869](vllm-project/vllm#53869). ##### `tests/ut/worker/test_model_runner_v2_finegrained_tp.py` 1. Adds `batch_sharder` and request-count fields to the bare fixture to match the new sampling contract. - Upstream coverage: [#50465](vllm-project/vllm#50465). ##### `tests/ut/worker/test_model_runner_v2_mamba.py` 1. Adds lane-aware descriptors and validates one main-lane hybrid backing with per-layer offsets. 2. Covers the removal of `indexes_kv_by_block_stride` through observable page-padding geometry. - Upstream coverage: [#51718](vllm-project/vllm#51718). ##### `tests/ut/worker/test_pcp_manager_v2.py` 1. Covers persistent Ascend input buffers, prefix-sum offset shape, padded local batches, main capture slot mappings, and old/new keyword signatures. 2. Verifies `dp_sync` on all three Ascend speculators and `pcp_manager` on graph capture. - Upstream coverage: [#53515](vllm-project/vllm#53515), [#53694](vllm-project/vllm#53694), and [#53869](vllm-project/vllm#53869). ### Does this PR introduce any user-facing change? No. This is an internal compatibility update; it does not add an Ascend-specific public API. ### How was this patch tested? - Exact-contract main2main validation and range prediction for vLLM [`ba07e4a48...e6bfe03ad`](vllm-project/vllm@ba07e4a...e6bfe03). - GitHub Actions: [run 33229439657](https://github.com/vllm-project/vllm-ascend/actions/runs/33229439657). - Successful in that run: pre-commit, both 310P jobs, all A3 jobs, and the passing A2 shards on both `e6bfe03ad...` and `v0.27.1`. - Pending rerun: ModelScope HTTP 500 failures on A2; two unchanged EPLB CPU tests fail identically on both lanes. - vLLM main: vllm-project/vllm@ba07e4a --------- Signed-off-by: liaoqidan <1107297340@qq.com> Signed-off-by: shenzhao <shenzhao9@huawei.com> Signed-off-by: LQDLove <LQDLove@users.noreply.github.com> Co-authored-by: shenzhao <shenzhao9@huawei.com> Co-authored-by: LQDLove <LQDLove@users.noreply.github.com>

Bugfix: use PCP slot mappings for PIECEWISE capture

ae324c1

Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com>

mergify Bot added nvidia mrv2 Model Runner V2 specific labels Aug 26, 2026

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mergify Bot added the bug Something isn't working label Aug 26, 2026

Refactor PCP capture manager type annotations

490898e

Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com>

pisceskkk marked this pull request as ready for review August 26, 2026 14:33

pisceskkk requested review from AndreasKaratzas, WoosukKwon, mgoin, njhill, vadiklyutiy and yewentao256 as code owners August 26, 2026 14:33

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Refactor PCP capture slot mapping selection

d0f3ca7

Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com>

Fix PCP slot mapping provider typing

647b339

Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com>

LucasWilkinson approved these changes Aug 27, 2026

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pisceskkk mentioned this pull request Aug 27, 2026

[Feature][PCP] Support decode-only FULL CUDA graphs #53867

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[CI] main2main vllm 0828 vllm-project/vllm-ascend#14872

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Bugfix: use PCP slot mappings for PIECEWISE capture (vllm-project#53869)

80897b2

Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com> Signed-off-by: khushali9 <khushali.desai9@gmail.com>

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Bugfix: use PCP slot mappings for PIECEWISE capture (vllm-project#53869)

7b49db2

Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com>

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[CI] main2main vllm 0828 vllm-project/vllm-ascend#15410

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[PR vllm-project#53869] Bugfix: use PCP slot mappings for PIECEWISE c…

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…apture Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com>

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[PR vllm-project#53869] Refactor PCP capture manager type annotations

7d6e916

Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com>

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[PR vllm-project#53869] Refactor PCP capture slot mapping selection

d287c3e

Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com>

LopezCastroRoberto pushed a commit to LopezCastroRoberto/vllm that referenced this pull request Aug 31, 2026

[PR vllm-project#53869] Fix PCP slot mapping provider typing

0ac3f2f

Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com>

pisceskkk mentioned this pull request Sep 1, 2026

[RFC]: Support Prefill Context Parallel (PCP) #25749

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khluu mentioned this pull request Sep 1, 2026

[CI] Disable CUDA graphs for GLM PCP evals #54745

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Bugfix: use PCP slot mappings for PIECEWISE capture (vllm-project#53869)

fcceca0

Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com>

mikeshawcode pushed a commit to mikeshawcode/vllm that referenced this pull request Sep 1, 2026

Bugfix: use PCP slot mappings for PIECEWISE capture (vllm-project#53869)

013e842

Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com> Signed-off-by: mikeshawcode <michaelwshaw2@gmail.com>

mikeshawcode pushed a commit to mikeshawcode/vllm that referenced this pull request Sep 1, 2026

Bugfix: use PCP slot mappings for PIECEWISE capture (vllm-project#53869)

e0120ad

Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com> Signed-off-by: mikeshawcode <michaelwshaw2@gmail.com>

mylibrar pushed a commit to tanyuqian/vllm that referenced this pull request Sep 3, 2026

Bugfix: use PCP slot mappings for PIECEWISE capture (vllm-project#53869)

c0d4b21

Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com>

sheralskumar pushed a commit to sheralskumar/vllm that referenced this pull request Sep 8, 2026

Bugfix: use PCP slot mappings for PIECEWISE capture (vllm-project#53869)

5e22dae

Signed-off-by: QiuChunshuo <qiuchunshuo@huawei.com>

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Bugfix: use PCP slot mappings for PIECEWISE capture - #53869

Bugfix: use PCP slot mappings for PIECEWISE capture#53869
LucasWilkinson merged 4 commits into
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Summary

Root cause

Why the previous PCP PIECEWISE validation did not expose it

Cross-GPU reproduction

Validation

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