[ROCm][PERF] Enable AITER PA gluon decode for MiniMax-M3 MTP and dense layers

[ukannika]

Purpose

The gluon paged-attention decode kernel handles multi-token query lengths, so
EAGLE3 speculative decoding no longer has to fall back to native vllm unified_attention.

Test Plan

Server cmd to run EAGLE3 speculative decoding

export VLLM_ENGINE_READY_TIMEOUT_S=3600
export VLLM_EXECUTE_MODEL_TIMEOUT_SECONDS=1800
export VLLM_USE_BREAKABLE_CUDAGRAPH=0
export VLLM_ROCM_USE_AITER=1
export VLLM_ROCM_USE_AITER_MOE=1
export VLLM_ROCM_USE_AITER_FUSION_SHARED_EXPERTS=1
export VLLM_ROCM_QUICK_REDUCE_QUANTIZATION=INT4
export VLLM_ROCM_QUICK_REDUCE_CAST_BF16_TO_FP16=0
export VLLM_ROCM_QUICK_REDUCE_QUANTIZATION_MIN_SIZE_KB=256
export VLLM_ROCM_SHUFFLE_KV_CACHE_LAYOUT=1
export VLLM_CUSTOM_SCOPES_FOR_PROFILING=1

vllm serve amd/MiniMax-M3-MXFP4  \
--served-model-name MiniMaxAI/MiniMax-M3 \
--port 8888 \
--tensor-parallel-size 4 \
--trust-remote-code \
--block-size 128 \
--enable-prefix-caching \
--enable-chunked-prefill \
--language-model-only \
--max-num-batched-tokens 65536 \
--default-chat-template-kwargs '{"thinking_mode":"enabled"}' \
--max-num-seqs 128 \
--kv-cache-dtype fp8 \
--attention-backend ROCM_AITER_FA \
--moe-backend aiter \
--reasoning-parser minimax_m3 \
--speculative-config '{"method": "eagle3", "model": "Inferact/MiniMax-M3-EAGLE3-GQA", "num_speculative_tokens": 3, "attention_backend": "ROCM_AITER_FA"}'

Test Result

MiniMax-M3 with EAGLE3 3-token speculative decoding sees a significant uplift at long context: the AITER gluon paged-attention kernel replaces the unified_attention fallback and is substantially faster for longer contexts.
Accuracy score:

Tasks	Version	Filter	n-shot	Metric		Value		Stderr
gsm8k	3	flexible-extract	5	exact_match	↑	0.9689	±	0.0048
		strict-match	5	exact_match	↑	0.9689	±	0.0048

[claude]

Claude Code Review

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[Rohan138]

minor q @ukannika can you include your env vars for AITER, shuffle KV cache, etc. in the repro command above?

[Rohan138]

LGTM but cc @tjtanaa for the ROCM_AITER_FA changes/ @jhu960213 for the kv cache layout

[dllehr-amd]

hey @ukannika Can you check pre-commit locally really quick? I know it's not running here, but I think there may be some errors

[ukannika]

hey @ukannika Can you check pre-commit locally really quick? I know it's not running here, but I think there may be some errors

checking now. thank you for reviewing.

[ukannika]

hey @ukannika Can you check pre-commit locally really quick? I know it's not running here, but I think there may be some errors

Sorry for that. we missed to push some code change. Fixed now. Thank you

[tjtanaa]

Should we update this?

get_kv_cache_shape is used by gpu runner to determine how the kvcache is packed in the kvcache buffers/pool/management system. It is not referring to the kvcache shape expect by the kernels.

The KVCACHE is reshaped on the fly in the attention forward pass from (num_blocks, num_kv_heads, block_size, 2 * head_size) to (num_blocks, 2, block_size, num_kv_heads, head_size) every time.

                    num_blocks, block_size, num_kv_heads, _ = key_cache.shape
                    x = 16 // key_cache.element_size()
                    new_key_cache = key_cache.reshape(
                        num_blocks, num_kv_heads, head_size // x, block_size, x
                    )
                    new_value_cache = value_cache.reshape(
                        num_blocks, num_kv_heads, block_size // x, head_size, x
                    )

However, the kvcache stored in the kvcache management system is still (num_blocks, num_kv_heads, block_size, 2 * head_size)

[ukannika]

@tjtanaa we see an issue if we don't define the shape and stride order when the shuffle layout is enabled: the pool is then labeled (num_blocks, num_kv_heads, block_size, 2*head_size), where each tokens K is immediately followed by its own V, head_size elements apart. The cache write kernel still writes each blocks K in the shuffle layout because of shuffle layout flag enabled, which assumes K and V are kept apart. Looking into how is it working with shuffle layout enabled for asm pa kernel before this change.

[ukannika]

@tjtanaa Enabled the shuffle layout flag and tested the Llama2 70B model using the asm_pa code path. I am seeing an accuracy issue, and the current state of this file is broken due to the layout changes introduced in this PR #44455. AITER assembly paged-attention kernels require independently contiguous K and V storage. This PR addresses the accuracy issue as well.
Here's the command to reproduce accuracy issue

export VLLM_ROCM_USE_AITER=1
export VLLM_ROCM_SHUFFLE_KV_CACHE_LAYOUT=1

vllm serve /model/llama2-70b-chat-hf/fp4_quantized_gptq \
  --dtype bfloat16 \
  --quantization quark \
  --tensor-parallel-size 1 \
  --max-model-len 2048 \
  --gpu-memory-utilization 0.94 \
  --attention-backend ROCM_AITER_FA \
  --kv-cache-dtype fp8 \
  --block-size 16 \
  --max-num-batched-tokens 32768 \
  --max-num-seqs 6400 \
  --enable-chunked-prefill \
  --async-scheduling \
  --host 0.0.0.0 \
  --port 8000

curl -s http://127.0.0.1:8000/v1/completions   -H "Content-Type: application/json"   -d '{
    "model": "/model/llama2-70b-chat-hf/fp4_quantized_gptq",
    "prompt": "The capital of France is",
    "max_tokens": 32,
    "temperature": 0
  }'```

[ukannika]

I see new layout changes updated in #51718. WIP on fixing this PR

[mergify]

This pull request has merge conflicts that must be resolved before it can be
merged. Please rebase the PR, @ukannika.

https://docs.github.com/en/pull-requests/collaborating-with-pull-requests/working-with-forks/syncing-a-fork

[tjtanaa]

LGTM

[github-actions]

✅ @ukannika, CI is now available for this PR.

• /ci run starts upstream CI; /amd-ci run starts AMD CI only.
• /ci retry retries failed jobs in the CI build for the current PR head. If the current head has no CI build, it starts a new CI build for the current head containing only jobs that failed in the latest earlier CI build for this PR.
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• /ci cancel cancels scheduled or running CI builds for this PR branch; /amd-ci cancel does the same for AMD CI only.

[tjtanaa]

/ci run

[github-actions]

✅ Triggered Buildkite CI #85290 for commit cf14ae1dd290.

[andyluo7]

The current head 78e1f096add7 is otherwise through pre-commit and is in AMD CI, but DCO is still blocked by commit history rather than the current diff. The commits needing an author-signed rewrite are:

• 98426528d127 (root@smci355-ccs-aus-n07-09...), no Signed-off-by
• c2b78e442d27 (root@smci355-ccs-aus-n07-09...), no Signed-off-by
• f587f84faa28, malformed Signed-off-by: <>

Please squash/reword those changes into commits signed by the human author (git commit -s); adding a later empty signed commit will not satisfy DCO for the earlier commits. After this dependency merges, #52664 can be rebased cleanly onto current main.

[tjtanaa]

/ci run

[github-actions]

✅ Triggered Buildkite CI #85903 for commit f38888128577.

[ukannika]

✅ Triggered Buildkite CI #85903 for commit f38888128577.
@tjtanaa test failure looks like a pre-existing breakage on main rather than something from this PR, Verified locally by checking out main and reproducing the test failure there. Could it be possible to merge this PR. Thank you

[zhou9402]

Hi @ukannika, thanks for the PR — it’s very important for performance!
One question: would it be possible to encapsulate the dynamic parts in metadata, so that we can use full decode graphs during decode? Because I see a regression in E2E though kernel UT shows great improvement.

[ukannika]

Hi @ukannika, thanks for the PR — it’s very important for performance! One question: would it be possible to encapsulate the dynamic parts in metadata, so that we can use full decode graphs during decode? Because I see a regression in E2E though kernel UT shows great improvement.

thank you, looking into this now. Can you share the recipe you used for E2E and perf numbers.

[ukannika]

Hi @ukannika, thanks for the PR — it’s very important for performance! One question: would it be possible to encapsulate the dynamic parts in metadata, so that we can use full decode graphs during decode? Because I see a regression in E2E though kernel UT shows great improvement.

thank you, looking into this now. Can you share the recipe you used for E2E and perf numbers.

@zhou9402 thank you, I checked and I am not able to reproduce the regression, yes we can move get_recommended_splits to the metadata builder so it's computed once per forward pass, but it won't cause a huge regression or a graph break.

[dllehr-amd]

/ci run

[github-actions]

✅ Triggered Buildkite CI #86037 for commit d94f6fda7b57.