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[ROCm][CI] add Aiter ops tests - #52208

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AndreasKaratzas merged 5 commits into
vllm-project:mainfrom
divakar-amd:aiter_ops_test_only
Aug 17, 2026
Merged

AndreasKaratzas merged 5 commits into
vllm-project:mainfrom
divakar-amd:aiter_ops_test_only

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@divakar-amd

@divakar-amd divakar-amd commented Aug 13, 2026

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Add ROCm AITER ops tests and enable Kernels Core Operation Test for the MI355 mirror

Tests cover:

  • rms_norm and rms_norm2d_with_add vs PyTorch reference
  • triton_rotary_embedding vs manual NeoX RoPE reference (xfail - known precision gap)
  • act_mul_and_fp8_group_quant (SiGLU + FP8 group quant)
  • Fused RMSNorm + quantization ops vs sequential composition
  • End-to-end inference chain (RMSNorm → FP8 quant → dequant)

New ops added to rocm_aiter_ops:

  • rms_norm - wraps aiter.rmsnorm2d_fwd
  • rms_norm2d_with_add - wraps aiter.rmsnorm2d_fwd_with_add

Add tests for ROCm aiter operations including rms_norm,
rms_norm2d_with_add, and various fused quantization ops.

Only adds two new methods to rocm_aiter_ops class:
- rms_norm: wraps aiter.rmsnorm2d_fwd
- rms_norm2d_with_add: wraps aiter.rmsnorm2d_fwd_with_add

Signed-off-by: Divakar Verma <divakar.verma@amd.com>
Signed-off-by: Divakar Verma <divakar.verma@amd.com>
@mergify mergify Bot added the rocm Related to AMD ROCm label Aug 13, 2026
@github-project-automation github-project-automation Bot moved this to Todo in AMD Aug 13, 2026
Signed-off-by: Divakar Verma <divakar.verma@amd.com>
@mergify mergify Bot added the ci/build label Aug 14, 2026
@divakar-amd
divakar-amd marked this pull request as ready for review August 14, 2026 18:10

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Claude Code Review

This pull request is from a fork — automated review is disabled. A repository maintainer can comment @claude review to run a one-time review.

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Overall LGTM, but let's address these few comments carefully.

Comment thread tests/kernels/core/test_rocm_aiter_ops.py Outdated
Comment thread tests/kernels/core/test_rocm_aiter_ops.py Outdated
Comment thread tests/kernels/core/test_rocm_aiter_ops.py Outdated
Comment thread tests/kernels/core/test_rocm_aiter_ops.py Outdated
Comment thread tests/kernels/core/test_rocm_aiter_ops.py Outdated
Signed-off-by: Divakar Verma <divakar.verma@amd.com>
Signed-off-by: Divakar Verma <divakar.verma@amd.com>
@AndreasKaratzas

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/ci run

@AndreasKaratzas AndreasKaratzas added the ready ONLY add when PR is ready to merge/full CI is needed label Aug 14, 2026
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✅ Triggered Buildkite CI #83971 for commit 343241c28927.

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@divakar-amd, CI is now available for this PR.

  • /ci run starts a CI build.
  • /ci retry retries failed jobs in the CI build for the current PR head. If the current head has no CI build, it starts a new CI build for the current head containing only jobs that failed in the latest earlier CI build for this PR.
  • /ci cancel cancels scheduled or running CI builds for this PR branch.

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LGTM

@AndreasKaratzas
AndreasKaratzas merged commit 49fb2ee into vllm-project:main Aug 17, 2026
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@github-project-automation github-project-automation Bot moved this from Todo to Done in AMD Aug 17, 2026
cos_pos = cos_half[positions] # [num_tokens, half_dim]
sin_pos = sin_half[positions] # [num_tokens, half_dim]

def apply_rope_ref(t: torch.Tensor) -> torch.Tensor:

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t.float() upcasts the operands to float32 before doing the unit RoPE op, which does not match aiter triton (keeps native dtype): https://github.com/ROCm/aiter/blob/main/aiter/ops/triton/_triton_kernels/rope/rope.py#L858

This has been a point of divergence before, because even vLLM's C++ and Triton RoPE impls do not fully agree on upcasting behavior for RoPE.
vLLM C++ always upcasts to fp32: https://github.com/vllm-project/vllm/blob/main/csrc/libtorch_stable/pos_encoding_kernels.cu#L18
vLLM Triton keeps native dtype by default unless enable_fp32_compute is set: https://github.com/vllm-project/vllm/blob/main/vllm/model_executor/layers/rotary_embedding/common.py#L151

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Thanks for sharing this @Rohan138. Opened a new PR to handle the fix.

zufangzhu pushed a commit to zufangzhu/vllm that referenced this pull request Aug 24, 2026
Signed-off-by: Divakar Verma <divakar.verma@amd.com>
Signed-off-by: Zhu, Zufang <zufang.zhu@intel.com>
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