[Bugfix][Spec Decode] Capture the widest uniform decode batch by default by rchalamala · Pull Request #50488 · vllm-project/vllm

rchalamala · 2026-07-30T22:39:00Z

[Bugfix][Spec Decode] Capture the widest uniform decode batch by default

Purpose

This PR was four fixes; at a maintainer's request it is now one. The others are
#50531 (warmup lookahead reservation) and #50532 (uniform-decode dispatch). The
rejection-sampler argmax fix is dropped from this stack in favour of #50183,
which covers the same defect.

max_cudagraph_capture_size defaults in units of tokens
(min(max_num_seqs * 2, 512)) while the batch it has to cover is
max_num_seqs * (1 + num_speculative_tokens) tokens. With speculation on, the
widest uniform decode batch falls outside the captured range and the largest
decode steps dispatch eager. On a lane at max_num_seqs=32 and
num_speculative_tokens=16 the decode capture list collapses to a single entry
while the log still reads FULL_DECODE_ONLY, which is why the correct value had
to be found by hand and passed as --max-cudagraph-capture-size 544 during
bring-up. 544 is exactly 32 * (1 + 16), and the rule here derives it.

The fix keeps the historical ceiling for the token-strided grid and adds the
decode sizes as a request-count grid scaled by query length, capped at 512
requests. Sizing the token grid off the speculative width instead would multiply
the number of captured graphs; that was the first shape of this fix and it is
not what is proposed here.

Two properties the tests pin:

Without speculation the default is bit-identical to the historical
min(max_num_seqs * 2, 512) for every max_num_seqs from 8 to 2048, so no
non-speculative configuration changes.
Under a dynamic speculative schedule the draft width varies per batch size, so
capture sizes are generated per tier rather than for the widest width alone.
Covering only the widest leaves the narrower tiers dispatching eager.

This is a VllmConfig default rather than a runner-specific path, so it affects
V1 as well as V2.

Test Plan

tests/compile/test_config.py asserts the rule directly rather than through an
engine: the non-speculative equivalence sweep above, that the widest uniform
decode batch lands inside the captured range once speculation is on, that the
cap is applied to requests rather than tokens, and that every tier of a dynamic
schedule is covered.

Test Result

pytest tests/compile/test_config.py on an H100 sandbox, this branch overlaid
on the pinned nightly wheel (0.26.1rc1.dev77+g6f91edf96): 53 passed, 9
failed.

The 9 failures are environmental and pre-existing — the same 9 fail on the
unmodified tree in the same container, all with ValueError: Free memory on device, because the box had 75 GiB of 81 GiB of GPU memory held by another
process. They are the engine-launching tests (test_use_cudagraphs,
test_enforce_eager, test_no_compilation and similar), none of which is a
capture-size test. Against that same baseline this branch takes the pass count
from 33 to 53.

Revert check: restoring the pre-existing formula fails exactly the
covers_widest_uniform_decode cases — including the off-stride case, where the
scalar ceiling coincidentally matches but the widest batch is still absent from
cudagraph_capture_sizes — plus caps_requests_not_tokens, while leaving all
16 unchanged_without_speculation cases passing.

ruff check and ruff format --check are clean on every touched file.

Model evaluation

tests/evals/gsm8k/gsm8k_eval.py, 400 questions, 5-shot, greedy, on
Qwen/Qwen3-4B with the published z-lab/Qwen3-4B-DFlash-b16 drafter at
num_speculative_tokens=16, V2 model runner, single H100: accuracy 0.880,
0.000 invalid, 400 questions. This was measured on the combined set of fixes
before the split, so it covers this change together with the others rather than
in isolation.

[Bugfix] Fix cuda graph sizes when running with speculative decoding #30330 — the earlier fix to the same capture-size default that this completes.
fix(cudagraph): align spec-decode capture sizes for PIECEWISE mode #46324 aligns spec-decode capture sizes for PIECEWISE mode specifically and
does not touch the default ceiling; [Perf] Raise Blackwell CUDA graph capture default to 1024 #49390 raises the Blackwell capture
default as a platform tuning choice rather than fixing the unit mismatch.

I checked for duplicate and overlapping open PRs (gh pr list --search on
"cudagraph capture size speculative", "max_cudagraph_capture_size",
"uniform decode capture").

I used AI assistance (Cursor) to draft, test, and validate this change, and I
reviewed every changed line before submitting.

github-actions · 2026-07-30T22:39:09Z

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njhill · 2026-07-31T02:22:32Z

Thanks @rchalamala! It would still be preferable if you could open each fix as a separate PR if possible.

…dule The tiers were read straight off num_speculative_tokens_per_batch_size, but build_dynamic_sd_schedule_lookup clamps every entry to min(num_speculative_tokens, entry_K) and carries a K forward through gaps between ranges and past the final range. So a configured width above num_speculative_tokens was captured though it can never run, and the batch sizes served at a carried-forward width -- the widest ones, whenever the last range ends below max_num_seqs -- were not captured at all, which is the coverage this defaults path exists to provide. Read the tiers off that lookup instead, so the two cannot disagree. Co-authored-by: Devin AI <158243242+devin-ai-integration[bot]@users.noreply.github.com> Signed-off-by: Rahul Chalamala <22563365+rchalamala@users.noreply.github.com> Co-Authored-By: Rahul Chalamala <22563365+rchalamala@users.noreply.github.com>

Build the token-strided cudagraph capture grid against the platform default (512, or 1024 on data center Blackwell) instead of the raised ceiling, and let the appended uniform decode sizes carry speculative decode coverage. Extending the token grid inflated the default capture set to 581 sizes at max_num_seqs=512 with 16 draft tokens; it is now 100. Fix the stale comment on the appended sizes. Also align CudaGraphManager._init_candidates with the scheduler: derive decode query lengths from build_dynamic_sd_schedule_lookup so clamping, gap and tail carry-forward match what the scheduler dispatches, instead of reading raw schedule widths. Signed-off-by: Rahul Chalamala <rahul@modal.com> Signed-off-by: Devin AI <158243242+devin-ai-integration[bot]@users.noreply.github.com>

Document uniform decode sizing for all query lengths above one and add sequence-parallel capture coverage. Signed-off-by: Rahul Chalamala <rahul@modal.com> Signed-off-by: Devin AI <158243242+devin-ai-integration[bot]@users.noreply.github.com> Co-Authored-By: Rahul Chalamala <22563365+rchalamala@users.noreply.github.com> Signed-off-by: Devin AI <158243242+devin-ai-integration[bot]@users.noreply.github.com>

Avoid validating a two-way tensor parallel world size against the single-GPU test host while retaining the sequence-parallel sizing assertions. Signed-off-by: Rahul Chalamala <rahul@modal.com> Signed-off-by: Devin AI <158243242+devin-ai-integration[bot]@users.noreply.github.com Co-Authored-By: Rahul Chalamala <22563365+rchalamala@users.noreply.github.com> Signed-off-by: Devin AI <158243242+devin-ai-integration[bot]@users.noreply.github.com>

Exercise static ngram sizing through VllmConfig post-init on CUDA. Signed-off-by: Rahul Chalamala <rahul@modal.com> Co-Authored-By: Rahul Chalamala <22563365+rchalamala@users.noreply.github.com> Signed-off-by: Devin AI <158243242+devin-ai-integration[bot]@users.noreply.github.com> Co-Authored-By: Rahul Chalamala <22563365+rchalamala@users.noreply.github.com> Signed-off-by: Devin AI <158243242+devin-ai-integration[bot]@users.noreply.github.com>

…nager test Co-authored-by: Devin <devin@cognition.ai> Signed-off-by: Rahul Chalamala <rahul@modal.com> Co-Authored-By: Rahul Chalamala <22563365+rchalamala@users.noreply.github.com>

Co-authored-by: Devin <devin@cognition.ai> Signed-off-by: Rahul Chalamala <rahul@modal.com> Co-Authored-By: Rahul Chalamala <22563365+rchalamala@users.noreply.github.com>

rchalamala · 2026-08-29T03:51:24Z

/ci run

github-actions · 2026-08-29T03:51:41Z

✅ Triggered Buildkite CI #86100 for commit 2b963ee1bcae.

…okens_per_batch_size with a ctx axis Implements RFC vllm-project#48627. Widen the DSD schedule schema so each entry can pin a context-length range in addition to a batch-size range, and change the scheduler lookup from dense[bs] to dense[bs][ctx_bucket]. - vllm/v1/spec_decode/dynamic/utils.py: DynamicSDLookup NamedTuple, 5-tuple parsing with 3-tuple backward compat, rectangular grid validation. - vllm/config/speculative.py: widen field type union. - vllm/v1/core/sched/scheduler.py: pick ctx bucket from p50 of scheduled requests' num_computed_tokens; no new plumbing. - tests/v1/spec_decode/test_dynamic_sd.py: existing tests preserved via legacy-flatten helper; new tests cover 5-tuple form, 2D dense correctness, bucket resolution, validation failures. - vllm/v1/worker/gpu/cudagraph_utils.py, vllm/config/vllm.py: the two callers of build_dynamic_sd_schedule_lookup added in vllm-project#50488 read a flat list; they now union the K values across context buckets of each row. For a legacy 3-tuple schedule every row has length 1, so the capture set and the per-tier widest batch size are unchanged. Legacy 3-tuple schedules produce a single-bucket lookup and take the same code path with no behavior change. 3-tuple and 5-tuple entries cannot be mixed within one schedule. 5-tuple schedules must form a rectangular grid so the lookup remains a plain 2D dense array. Signed-off-by: seongyun.kim <197560810+seongyun1104@users.noreply.github.com>

…ult (vllm-project#50488) Signed-off-by: Rahul Chalamala <22563365+rchalamala@users.noreply.github.com> Signed-off-by: Devin AI <158243242+devin-ai-integration[bot]@users.noreply.github.com> Signed-off-by: Rahul Chalamala <rahul@modal.com> Co-authored-by: Janelle Cai <janelle.cai@modal.com> Co-authored-by: Devin AI <158243242+devin-ai-integration[bot]@users.noreply.github.com> Co-authored-by: Devin <devin@cognition.ai>

…ult (vllm-project#50488) Signed-off-by: Rahul Chalamala <22563365+rchalamala@users.noreply.github.com> Signed-off-by: Devin AI <158243242+devin-ai-integration[bot]@users.noreply.github.com> Signed-off-by: Rahul Chalamala <rahul@modal.com> Co-authored-by: Janelle Cai <janelle.cai@modal.com> Co-authored-by: Devin AI <158243242+devin-ai-integration[bot]@users.noreply.github.com> Co-authored-by: Devin <devin@cognition.ai> (cherry picked from commit d3d79ff)

…okens_per_batch_size with a ctx axis Implements RFC vllm-project#48627. Widen the DSD schedule schema so each entry can pin a context-length range in addition to a batch-size range, and change the scheduler lookup from dense[bs] to dense[bs][ctx_bucket]. - vllm/v1/spec_decode/dynamic/utils.py: DynamicSDLookup NamedTuple, 5-tuple parsing with 3-tuple backward compat, rectangular grid validation. - vllm/config/speculative.py: widen field type union. - vllm/v1/core/sched/scheduler.py: pick ctx bucket from p50 of scheduled requests' num_computed_tokens; no new plumbing. - tests/v1/spec_decode/test_dynamic_sd.py: existing tests preserved via legacy-flatten helper; new tests cover 5-tuple form, 2D dense correctness, bucket resolution, validation failures. - vllm/v1/worker/gpu/cudagraph_utils.py, vllm/config/vllm.py: the two callers of build_dynamic_sd_schedule_lookup added in vllm-project#50488 read a flat list; they now union the K values across context buckets of each row. For a legacy 3-tuple schedule every row has length 1, so the capture set and the per-tier widest batch size are unchanged. Legacy 3-tuple schedules produce a single-bucket lookup and take the same code path with no behavior change. 3-tuple and 5-tuple entries cannot be mixed within one schedule. 5-tuple schedules must form a rectangular grid so the lookup remains a plain 2D dense array. Signed-off-by: seongyun.kim <197560810+seongyun1104@users.noreply.github.com>

mergify Bot added nvidia speculative-decoding mrv2 Model Runner V2 specific labels Jul 30, 2026

github-project-automation Bot added this to NVIDIA Jul 30, 2026

mergify Bot added the bug Something isn't working label Jul 30, 2026

rchalamala force-pushed the rahul/k3-pr1-mrv2-spec branch 2 times, most recently from 3fdf6cc to ed0b000 Compare July 30, 2026 22:47

rchalamala marked this pull request as ready for review July 30, 2026 23:57

rchalamala requested review from ApostaC, ProExpertProg, WoosukKwon, alexm-redhat, heheda12345, houseroad, ivanium, mgoin, njhill, orozery, robertgshaw2-redhat, tlrmchlsmth, yewentao256, youkaichao and ywang96 as code owners July 30, 2026 23:57

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rchalamala marked this pull request as draft July 31, 2026 00:14

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rchalamala and others added 7 commits August 28, 2026 20:44

[Bugfix][Spec Decode] Use a valid dynamic SD schedule in cudagraph ma…

44be5e2

…nager test Co-authored-by: Devin <devin@cognition.ai> Signed-off-by: Rahul Chalamala <rahul@modal.com> Co-Authored-By: Rahul Chalamala <22563365+rchalamala@users.noreply.github.com>

Order the dynamic SD test schedule by narrowing K

2b963ee

Co-authored-by: Devin <devin@cognition.ai> Signed-off-by: Rahul Chalamala <rahul@modal.com> Co-Authored-By: Rahul Chalamala <22563365+rchalamala@users.noreply.github.com>

auto-merge was automatically disabled August 29, 2026 03:44
Head branch was pushed to by a user without write access

rchalamala force-pushed the rahul/k3-pr1-mrv2-spec branch from 20cfe3d to 2b963ee Compare August 29, 2026 03:44

njhill merged commit d3d79ff into vllm-project:main Aug 29, 2026
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vllm-agent mentioned this pull request Aug 29, 2026

Revert "[Bugfix][Spec Decode] Capture the widest uniform decode batch by default" (#50488) #54352

Draft

khluu mentioned this pull request Aug 30, 2026

[Bugfix][Spec Decode] Keep default CUDA graph sizes memory-safe #54418

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puririshi98 mentioned this pull request Aug 31, 2026

[Perf][Spec Decode] Optimize BS=1 dflash/dspark serving (+11% decode, -58% cache-hit TTFT) #54485

Open

SubSir mentioned this pull request Aug 31, 2026

[Bugfix][Spec Decode] Take the DFlash draft's RoPE layout from its own config #54373

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seongyun1104 mentioned this pull request Sep 1, 2026

[RFC]: The dynamic-SD K decision is a batch-keyed array index — agreeing on its shape before more signals arrive #54749

Open

ivanfioravanti mentioned this pull request Sep 2, 2026

[Bug]: Explicit scalar CUDA graph maximum can drop a required uniform-decode shape #54933

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1 task

seongyun1104 mentioned this pull request Sep 9, 2026

[Bug][Spec Decode] num_speculative_tokens_per_batch_size + MTP speculator fails full CUDA graph decode capture (InputBatch.make_dummy assert) #48494

Open

andylolu2 mentioned this pull request Sep 17, 2026

[Bugfix] Max-load throughput cliff when max_num_seqs is not a multiple of 8 #57355

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[Bugfix][Spec Decode] Capture the widest uniform decode batch by default - #50488

[Bugfix][Spec Decode] Capture the widest uniform decode batch by default#50488
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[Bugfix][Spec Decode] Capture the widest uniform decode batch by default

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