[Perf] Shape-adaptive tile config for batch-invariant matmul on SM80

[shivasathishs-rp]

Purpose

Part of the batch-invariant performance work tracked in #27433 ("Optimize the batch
invariant performance").

On SM80 (Ampere), enable_batch_invariant_mode() routes every mm/addmm/matmul/
linear through the Triton matmul_persistent kernel, because cuBLASLt-only determinism is
not reliable on Ampere. That kernel used a single hardcoded tile config per dtype
(BLOCK_SIZE_M=128, N=128/256, K=64/32, num_warps=8, num_stages=3) regardless of
problem shape. For the small-M decode shapes that dominate batch-invariant serving (RL
rollouts, reproducible inference), a 128-row M-tile spends most of its rows on masked
padding.

Measured on A100-40GB (bf16, Qwen2.5-7B shapes), the fixed-config Triton path was 6.5x
slower than cuBLAS at M=1 and 5.1x at M=64, shrinking to 1.85x at M=2048.

Change

Add _matmul_config(M, N, dtype), a static shape-based tile-config selector:

• Small M (decode, M <= 64): shrink BLOCK_SIZE_M to 16/32/64 (smallest that covers M);
  widen BLOCK_SIZE_N to 256 for wide-N layers (gate/up, lm_head), else 64.
• Large M (M > 64, prefill): return the original base config unchanged, so that path has
  zero regression.

A static heuristic is used rather than @triton.autotune: it is deterministic (no
first-call tuning latency spike, no run-to-run config variance — which matters especially
for a reproducibility feature), and it matches the existing fused_moe get_default_config
pattern in the repo. The heuristic is correctly scoped to SM80, since the whole
matmul_persistent path is only installed there.

Scope is matmul_persistent only (covers mm/addmm/matmul-2D/linear, the measured
bottleneck). bmm_kernel has the same fixed-config pattern and is a natural follow-up.

Batch invariance is preserved

BLOCK_SIZE_K is the only tile parameter that changes the per-output-element K-reduction
order, so it is pinned per dtype (bf16/fp16 -> 64, fp32 -> 32) and never varies with
shape. Every other parameter (BLOCK_SIZE_M/N, GROUP_SIZE_M, num_warps, num_stages)
only remaps how rows/columns are tiled and leaves each row's reduction order untouched, so
it is free to vary by shape.

Verified on A100 under VLLM_BATCH_INVARIANT=1 that a row's output is bitwise identical
(torch.equal) whether it is processed alone at M=1 or embedded in a larger batch, across
every config bucket boundary (M in {1, 8, 9, 16, 17, 32, 64, 65, 128, 129, 256, 512}) and
for bf16/fp16/fp32. This is the meaningful test: because the adaptive config picks a
different tile shape for decode vs prefill, the comparison genuinely crosses config buckets
rather than pinning one config.

Results (A100-40GB, bf16, matmul_persistent before vs after)

shape (M,K,N)	before µs	after µs	speedup
(1, 3584, 3584)	116	52	2.23x
(1, 3584, 18944)	391	127	3.08x
(1, 3584, 152064) lm_head	1670	888	1.88x
(8, 3584, 3584)	112	52	2.15x
(16, 3584, 3584)	106	52	2.04x
(64, 3584, 3584)	98	52	1.90x
(128, 3584, 3584)	96	96	1.00x (base)
(512, 3584, 3584)	196	196	1.00x (base)
(2048, 3584, 3584)	495	495	1.00x (base)

Small-M decode is 1.9-3.1x faster; large-M prefill is unchanged.

Not a duplicate

Checked open PRs (gh pr list --state open --search "batch invariant matmul" /
"matmul_persistent tile"). No open PR touches the matmul_persistent tile config or adds
matmul config selection. Merged batch-invariant perf PRs optimized different paths: #29345
(BMM kernel), #40408 (FP8 CUTLASS), #40413 (fused RMSNorm).

Test plan and results

VLLM_BATCH_INVARIANT=1 pytest tests/v1/determinism/test_matmul_batch_invariant.py -v
on A100-40GB: 33 passed. This includes:

• Extended tests/v1/determinism/test_matmul_batch_invariant.py:
  • test_matmul_config_block_k_fixed_across_shapes (fp16/bf16/fp32): asserts BLOCK_SIZE_K
    is constant across all M/N for each dtype (the invariance-critical guard).
  • test_matmul_batch_invariance_across_config_buckets (N in {3584, 8192} x fp16/bf16):
    asserts bitwise invariance across every bucket boundary with the adaptive config live,
    including the wide-N BLOCK_SIZE_N=256 path.
  • All pre-existing test_matmul_correctness and test_matmul_batch_invariance cases.
• Benchmarks above collected with VLLM_BATCH_INVARIANT=1 on A100-40GB.
• ruff check / ruff format --check: pass.

Output is unchanged bitwise, so no accuracy/eval delta is expected and none is required.

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[yewentao256]

Thanks for the work. We tend not to update config for a specific device, unless you can fully test the config in SM80, SM90 and SM100+

[shivasathishs-rp]

Thanks for taking a look, and for the guardrail — I agree device-specific tuning shouldn't land without cross-arch validation. I think this case is narrower than it first appears, though.

The Triton matmul_persistent path (which is the only thing _matmul_config feeds) is installed exclusively in the is_device_capability_family(80) branch of enable_batch_invariant_mode — the Ampere/Ada 8.x family. SM90 (Hopper) and SM100+ (Blackwell) take the separate else branch that disables cuBLAS split-k and never registers a Triton matmul override, so they never execute _matmul_config at all. In other words this isn't a new device-specific config competing with a shared default; it's tuning for the one arch family where this kernel is the active path, and it can't affect SM90/SM100 behavior. That branch split is pre-existing — this PR doesn't change any of the arch routing.

Within the 8.x family, the config stays correct on the smaller-smem parts (SM86/SM89): block_n is capped by _fp16_block_size_n, the device's shared-memory-derived limit computed at enable time, so we never launch a tile too wide for those cards. The perf heuristic itself was tuned on A100 (6.5x at M=1), and I've validated batch invariance on A100.

On the determinism side, BLOCK_SIZE_K is pinned per dtype (bf16/fp16=64, fp32=32) and is the same value the previous config used — it's the only tile parameter that affects per-row K-reduction order, and _matmul_config never varies it with shape. Only BLOCK_SIZE_M/BLOCK_SIZE_N change, and those just remap tiles. I added two tests for this: one asserting BLOCK_SIZE_K is constant across a grid of M/N, and one doing a bitwise torch.equal check that a given row's output is identical whether it's run alone or batched across every config bucket boundary.

If it would help make the SM80-exclusivity self-documenting, I'm happy to add a short comment (or a lightweight assert) at the kernel install site noting that this path — and therefore this config — only runs on the 8.x family. Let me know if you'd prefer that, or if you'd still like SM90/SM100 numbers even though the path is inactive there; I only have A100 access, so I can't produce those directly but can help however is useful.

[yewentao256]

Thanks, SM80 is not our main target for optimization, and we may not want to introduce specific code change for it.

[shivasathishs-rp]

Understood on SM80 not being an optimization target. Just to clarify one thing, in case it changes the calculus: this PR doesn't add a new SM80-specific path. The SM80 branch in enable_batch_invariant_mode and the Triton matmul_persistent kernel it routes to already exist upstream (SM80 can't rely on cuBLASLt-only determinism, so it needs the Triton path, while SM90/SM100 use the cuBLAS split-k disable). All this change does is make the tile config inside that already-SM80-only kernel shape-adaptive, so there's no new device-specific surface to maintain.

That said, if the preference is simply not to invest further in the SM80 path regardless, that's completely fair and I'm happy to close.

[mergify]

This pull request has merge conflicts that must be resolved before it can be
merged. Please rebase the PR, @shivasathishs-rp.

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