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[Kernel] Support UE8M0 scales in fused SiLU block quant - #43399

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qianlihuang wants to merge 4 commits into
vllm-project:mainfrom
qianlihuang:yiliu/remove-e8m0-restriction-triton-moe
Open

qianlihuang wants to merge 4 commits into
vllm-project:mainfrom
qianlihuang:yiliu/remove-e8m0-restriction-triton-moe

add bench

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