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[Kernel] Support UE8M0 scales in fused SiLU block quant - #43399
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Pull request overview
Removes an E8M0-related guard that prevented the fused SiLU+Mul + FP8 block quant CUDA kernel from being used in Triton MoE experts, ensuring the fused path can run under the default DeepGEMM E8M0 configuration.
Changes:
- Dropped the
is_deep_gemm_e8m0_used()import and the corresponding runtime condition in the fused-kernel eligibility check. - Allows
ops.silu_and_mul_per_block_quantto be selected based solely on activation/quant/block-shape/LoRA constraints.
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Code Review
This pull request removes the is_deep_gemm_e8m0_used check and its corresponding import from the Triton MoE layer, simplifying the conditional logic in the apply method for FP8 W8A8 quantization. I have no feedback to provide as there were no review comments to evaluate.
Signed-off-by: qianlihuang <yiliu.dong@qq.com>
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Purpose
use_ue8m0support tosilu_and_mul_per_block_quant.In addition to #42497 This patch adds the missing flag so the fused path can be used in both modes without changing scale semantics.
Test Plan
Test Result
Essential Elements of an Effective PR Description Checklist
supported_models.mdandexamplesfor a new model.