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[Perf][Kernel] Use bf16 shared staging in mHC pre TileLang kernel#42735

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[Perf][Kernel] Use bf16 shared staging in mHC pre TileLang kernel#42735
piaoyanglink15 wants to merge 2 commits into
vllm-project:mainfrom
piaoyanglink15:dev_mhc_pre_big_fuse

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Summary

This PR changes the residual shared-memory staging buffer in
mhc_pre_big_fuse_tilelang from float32 to bfloat16:

xs = T.alloc_shared((hc_mult, hidden_block), T.bfloat16)

The staged source tensor is already bfloat16, and the values are still loaded
into a float32 fragment before accumulation. This reduces shared memory
traffic and footprint without changing the final output.

This PR also adds:

  • a TileLang reference test that compares the new bf16_shared path against
    the previous float32_shared staging path;
  • deterministic and MHCPreOp registered-dispatch coverage;
  • a kernel benchmark for comparing bf16_shared and float32_shared across
    larger DeepSeek-V4-shaped token counts from 256 to 262144 tokens.

Duplicate-work check

I checked open PRs in vllm-project/vllm with these keyword searches:

  • mhc_pre
  • mhc_pre_big_fuse
  • TileLang MHC
  • DeepSeek V4 MHC

No open PR was found for this exact mhc_pre_big_fuse_tilelang shared-staging
dtype optimization. Broader hits such as #40929, #41136, #40892, and #40909 are
about SM120 fallback, ROCm enablement, or AITER/MLA work, not this CUDA TileLang
mHC pre staging change.

Tests

Run from the repository root in a CUDA environment with TileLang and DeepGEMM
available:

python -m pytest tests/kernels/test_mhc_pre_big_fuse_tilelang.py -q

Result:

14 passed, 27 warnings in 7.79s

Benchmark

Environment:

  • GPU: NVIDIA B200-class CUDA GPU
  • PyTorch: 2.11.0+cu130
  • CUDA: 13.1
  • TileLang: available
  • DeepGEMM: available

Command:

python benchmarks/kernels/benchmark_mhc_pre_big_fuse.py \
  --variants bf16_shared float32_shared \
  --warmup 5 \
  --repeats 30 \
  --shapes \
    256,4096,37 \
    512,4096,18 \
    1024,4096,9 \
    2048,4096,4 \
    4096,4096,2 \
    8192,4096,1 \
    16384,4096,1 \
    32768,4096,1 \
    65536,4096,1 \
    131072,4096,1 \
    262144,4096,1

Summary:

tokens bf16_shared ms float32_shared ms float32 / bf16 max abs diff
256 0.0200 0.0237 1.190x 0.000e+00
512 0.0196 0.0204 1.041x 0.000e+00
1024 0.0209 0.0236 1.131x 0.000e+00
2048 0.0250 0.0321 1.285x 0.000e+00
4096 0.0423 0.0511 1.207x 0.000e+00
8192 0.0677 0.0819 1.209x 0.000e+00
16384 0.1173 0.1428 1.218x 0.000e+00
32768 0.2158 0.2647 1.227x 0.000e+00
65536 0.4149 0.5103 1.230x 0.000e+00
131072 0.8123 1.0019 1.233x 0.000e+00
262144 1.6079 1.9836 1.234x 0.000e+00

AI assistance disclosure

AI assistance was used to help prepare and validate this change. I reviewed the
changed lines and test results and am responsible for the contribution.

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@mergify mergify Bot added the performance Performance-related issues label May 15, 2026
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Code Review

This pull request optimizes the mhc_pre_big_fuse_tilelang operation by switching the shared memory staging buffer for the residual from float32 to bfloat16. Additionally, it introduces a benchmark and a comprehensive test suite for the TileLang mHC-pre fused backend. Feedback was provided regarding the numerical tolerances in the correctness tests, suggesting they should be tightened to better reflect the expected precision of the operation, as the change in staging dtype should ideally result in nearly identical outputs.

Comment thread tests/kernels/test_mhc_pre_big_fuse_tilelang.py
@piaoyanglink15 piaoyanglink15 force-pushed the dev_mhc_pre_big_fuse branch from 6f2d077 to 37d2e9a Compare May 16, 2026 01:39
Signed-off-by: piaoyang <piaoyanglink@163.com>
@piaoyanglink15 piaoyanglink15 force-pushed the dev_mhc_pre_big_fuse branch from 37d2e9a to 26101c0 Compare May 16, 2026 01:49
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mergify Bot commented May 29, 2026

This pull request has merge conflicts that must be resolved before it can be
merged. Please rebase the PR, @piaoyanglink15.

https://docs.github.com/en/pull-requests/collaborating-with-pull-requests/working-with-forks/syncing-a-fork

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