[KV connector] LMCacheMPConnector: SupportsHMA for hybrid models#42437
[KV connector] LMCacheMPConnector: SupportsHMA for hybrid models#42437yoo-kumaneko wants to merge 1 commit into
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Make the LMCache MP connector compatible with vLLM's hybrid KV cache
manager so it can serve DeepSeek-V4 (and any future model with
multiple ``KVCacheGroupSpec``s) end-to-end.
Three things had to come together; squashed because none of them
function on their own.
1. SupportsHMA + per-layer hints
--------------------------------
* Inherit ``SupportsHMA``: without it, the scheduler at
``v1/core/sched/scheduler.py`` rejects any KV connector with
``len(kv_cache_groups) > 1``.
* Implement ``request_finished_all_groups``: 4-line body mirroring
``request_finished`` (cleanup tracker + end_session by request_id).
The per-group ``block_ids`` argument is intentionally unused at
finish time -- cleanup is by request_id, and the per-group counts
surfaced in ``num_lmcache_extra_cached_tokens`` come from the
tracker, not the freshly-passed block IDs.
* ``register_kv_caches``: walk ``self._kv_cache_config.kv_cache_groups``
once and produce two per-positional-layer lists --
``per_layer_logical_block_size`` (from ``KVCacheSpec.block_size``)
and ``per_layer_kv_cache_group_id`` (from the gid index). Both are
forwarded to LMCache via the adapter's ``extra_layout_hints`` kwarg
so LMCache can split layers correctly under V4 hybrid (e.g. gids 1
and 2 share specs but are disjoint namespaces). Single-group
engines drop both lists, so the LMCache adapter sees no extra hints
and behavior is identical to the prior path.
2. Per-gid request tracker + LoadStoreOp wire format
----------------------------------------------------
* ``LMCacheMPRequestTracker.allocated_block_ids: dict[int, list[int]]``
(was ``list[int]``), keyed by gid. Adds
``append_block_ids_per_group``, ``num_allocated_blocks_per_group``,
and ``total_allocated_blocks`` helpers.
* ``LMCacheMPConnector.__init__`` builds
``self._gid_to_block_size: dict[int, int]`` from
``self._kv_cache_config.kv_cache_groups``. Single-group fallback
is ``{0: vllm_block_size}``.
* ``LMCacheMPRequestMetadata.GetStoreMetadata`` /
``GetRetrieveMetadata`` now take ``gid_to_block_size`` and emit
per-gid ``block_ids`` slices. ``coarse_block_count`` replaces
``len(allocated_block_ids)`` as the prefix bound -- min across
per-gid normalised lengths so an inconsistent gid surfaces as an
under-store rather than a silent half-aligned store.
* ``update_state_after_alloc`` and ``_process_cached_requests``
consume ``KVCacheBlocks.get_block_ids() -> tuple[list[int], ...]``
directly per-gid instead of flattening via ``reformat_block_ids``.
``reformat_block_ids`` is removed.
* ``_report_block_allocation_deltas`` uses gid 0 as the "primary"
namespace for L0 telemetry. For non-hybrid models gid 0 is the
only namespace; the L0 channel currently can't carry per-gid info.
3. Per-gid block-ID slice rule (divide vs multiply)
---------------------------------------------------
The naive Phase-AB formula
multiplier = vllm_block_size // gid_block_size
is only correct when ``vllm_block_size >= gid_block_size``. Under
HMA, ``cache_config.block_size`` collapses to the GCD of all gid
block sizes -- on V4-Flash with block sizes 256 / 64 / 64 / 4 / 8
that's 4. So with the naive formula:
* gid 3 (bs=4): multiplier = 4 / 4 = 1 ✓
* gid 4 (bs=8): multiplier = 4 / 8 = 0 ✗ -- emits empty slice
* gid 1,2 (bs=64): multiplier = 4/64 = 0 ✗ -- emits empty slice
* gid 0 (bs=256): multiplier = 4/256 = 0 ✗ -- emits empty slice
LMCache groups for vLLM gids 0/1/2/4 then receive zero-length
``staged_block_ids_per_namespace[*]`` tensors, the per-LMCache-group
kernel dispatch trips ``num_blocks_per_object * shape_desc.bs (0) ==
lmcache_chunk_size`` and STORE/RETRIEVE fails outright.
Fix: ``LMCacheMPRequestMetadata._per_gid_slice`` static helper picks
the divide-or-multiply branch based on which side of
``vllm_block_size`` the gid block size lands on:
if gid_bs >= vllm_block_size:
ratio = gid_bs // vllm_block_size
gid_start, gid_end = start // ratio, end // ratio
else:
ratio = vllm_block_size // gid_bs
gid_start, gid_end = start * ratio, end * ratio
When ``gid_bs == vllm_block_size`` (every non-hybrid model, plus V4
gid 3 under HMA) both branches give the same answer, so V3.2 and
non-hybrid behavior are byte-for-byte unchanged.
The ``coarse_block_count`` formula (``length * gid_block_size //
vllm_block_size``) was already correct in both directions -- it
multiplies up to vllm_block_size grain and is unaffected.
Verification
------------
End-to-end on DeepSeek-V4-Flash, tp=4, ``--no-disable-hybrid-kv-
cache-manager``, lmcache chunk_size=1024:
* Connector emits ``[16, 64, 64, 1024, 512]`` for a 4096-token
prompt -- matches per-gid grids (4096/256=16, /64=64, /4=1024,
/8=512).
* LMCache server "Stored 4096 tokens in 0.224 seconds", zero
kernel-constraint errors, zero ``[DSV4-...UNDERFLOW]`` warnings.
* With ``--no-enable-prefix-caching`` to bypass vLLM APC: identical
follow-up prompt produces ``Retrieved 4096 tokens`` × 4 (one per
TP worker) and vLLM ``External prefix cache hit rate`` jumps from
0.0% to 48.8%, confirming KV came from LMCache and not re-prefill.
Backward compat: single-group engines hit the SupportsHMA fallback
that drops both layout-hint lists, the gid_to_block_size dict has
one entry, multipliers are all 1, and every slice/iteration matches
the prior flat-list semantics.
Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
Signed-off-by: kumaneko <crclq2018@gmail.com>
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Code Review
This pull request updates the LMCacheMPConnector to support Hybrid KV Cache Management (HMA) by transitioning the tracking of allocated block IDs from a flat list to a per-group dictionary. Key changes include the introduction of per-group slicing logic in LMCacheMPRequestMetadata, the addition of request_finished_all_groups to handle HMA cleanup, and the propagation of layout hints during KV cache registration. Review feedback identifies a potential logic error in GetStoreMetadata where the coarse_block_count calculation might ignore empty groups, potentially leading to empty slices that could trigger server-side errors; a more robust calculation method is suggested.
| if per_gid_lengths: | ||
| coarse_block_count = min( | ||
| length * gid_to_block_size[gid] // vllm_block_size | ||
| for gid, length in per_gid_lengths.items() | ||
| ) | ||
| else: | ||
| coarse_block_count = 0 |
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The current calculation of coarse_block_count only considers groups that are already present in tracker.allocated_block_ids. In a hybrid KV cache scenario, if one group has not yet been allocated any blocks (e.g., due to an edge case in vLLM's scheduler or if the group's block size is larger than the current token count), it will be missing from per_gid_lengths. This would result in coarse_block_count being calculated based only on the non-empty groups, potentially leading to a non-zero count even when some groups have zero blocks. This would cause _per_gid_slice to emit empty lists for the missing groups, which can trip kernel constraint checks on the LMCache server. It is safer to iterate over all expected groups from gid_to_block_size and default missing groups to zero.
coarse_block_count = min(
per_gid_lengths.get(gid, 0) * gid_to_block_size[gid] // vllm_block_size
for gid in gid_to_block_size
)|
This pull request has merge conflicts that must be resolved before it can be |
Purpose
Make
LMCacheMPConnectorwork with vLLM's hybrid KV cache manager (SupportsHMA). Without this,vllm serve --kv-transfer-config '{"kv_connector":"LMCacheMPConnector",...}'automatically falls back to--disable-hybrid-kv-cache-manager, costing real performance on hybrid-attention models — most concretely DeepSeek-V4, which exposes 5KVCacheGroupSpecs with mixed scheduler block sizes (256 / 64 / 4 / 8) and uses anas_stridedpage_size_paddedMLA layout.This PR makes
LMCacheMPConnectorinheritSupportsHMAand threads per-KVCacheGroupSpecblock-ID metadata through the connector's tracker and the LMCache MP wire protocol so each engine-side gid is dispatched correctly on store/retrieve.The companion LMCache-side change is LMCache PR #3261: LMCache/LMCache#3261. The two PRs depend on each other and should land together.
What changes here (vLLM-side)
SupportsHMAinheritance forLMCacheMPConnector. Implementsrequest_finished_all_groupsfor the hybrid path; the existingrequest_finishedcontinues to handle non-hybrid models unchanged.LMCacheMPRequestTracker.allocated_block_idsis nowdict[int, list[int]]keyed by engine-sidekv_cache_group_id. Non-hybrid models populate only key 0 and behave byte-for-byte identically.register_kv_caches: buildsper_layer_logical_block_sizeandper_layer_kv_cache_group_idlists fromself._kv_cache_config.kv_cache_groupsand forwards them to LMCache via the adapter'sextra_layout_hints. LMCache uses these to split layers that share physical tensor shape but pull block IDs from disjoint engine-side namespaces (e.g. V4 hybrid gids 1 and 2, or V4's main-KV vs SWA-64 layers at the samephysical_bsbut differentlogical_bs).GetStoreMetadata/GetRetrieveMetadataslicetracker.allocated_block_ids[gid]using the divide-or-multiply ratio ofvllm_block_sizeto each gid'sKVCacheSpec.block_size. Handles bothgid_bs >= vllm_block_size(the V4-HMA case wherecache_config.block_sizecollapses to GCD=4 on a model with bs=256/64/4/8, so gids 0/1/2 slice asstart // (gid_bs / vllm_bs)), andgid_bs <= vllm_block_size(the legacy non-hybrid case,vllm_bs == gid_bs == 256, multiplier=1).LoadStoreOp.block_idsand the LMCache MPSTORE/RETRIEVEpayload schemas werelist[int]and are nowlist[list[int]]indexed by gid. Single-gid models pass a length-1 outer list — fully backward-compatible at runtime.Why this is not duplicating an existing PR
I searched open PRs touching the LMCache connector and hybrid KV cache:
gh pr list --search "LMCacheMPConnector SupportsHMA"→ 0 resultsgh pr list --search "LMCache hybrid kv cache"→ 0 resultsgh pr list --search "lmcache_mp_connector"→ 0 resultsThe closest hit is #38261 "Hybrid KV offload: planner, MultiConnector, and mamba alignment", which touches
lmcache_connector.py(the legacy non-MP path) and the offloading-connector / planner subsystem. It does not touchlmcache_mp_connector.py, does not introduceSupportsHMAfor the LMCache MP path, and is solving a different problem. No overlap.Test Plan
End-to-end V4 HMA-on smoke test on DeepSeek-V4-Flash (tp=4, fp8,
--block-size 256,--enforce-eager,--no-disable-hybrid-kv-cache-manager,--no-enable-prefix-cachingto force LMCache-served retrieves) against an LMCache MP server withchunk_size=1024. Sequence:Plus the LMCache-side unit test suite (
pytest tests/v1/multiprocess/).Test Result
V4 HMA-on (the configuration this PR enables):
KVCacheSpecfield values (differentkv_cache_group_id); main-KV vs SWA-64 layers split despite identicalphysical_bs=64(differentlogical_bs).Stored 4096 tokens in 0.222 secondsserver-side. Zero kernel-constraint errors.Retrieved 4096 tokens in 0.007 seconds× tp=4 workers. Zero kernel-constraint errors.External prefix cache hit rategoes from 0.0% (cold) to 48.8% on the warm request, matching the expected4096 / (cold_prompt + warm_prompt)ratio.V3.2 (non-hybrid baseline, unchanged path): byte-for-byte identical to current main behavior — single-gid models populate only
allocated_block_ids[0], the per-gid slicing helper hits the legacymultiplier=1branch, the wire format wraps the single block-ID list in a length-1 outer list.LMCache-side unit tests: 109/109 passing (89 multiprocess tests + 20 new shape-spec tests in
test_kv_layer_groups_manager.py). One test was OOM-killed by an unrelated 95-GiB-of-96-GiB cluster workload, not a regression — the same test passes when GPU memory is available.AI assistance disclosure
This PR was developed with AI assistance (Claude Code). The submitting human reviewed every changed line, ran the smoke test end-to-end on a real DeepSeek-V4-Flash deployment, and is responsible for defending the change. The companion LMCache PR (#3261) was developed and tested in the same session.