Add SM120 for NVFP4 tensor core support

[zeryx]

Environment

• vLLM: main @ db9a84e (post-0.20.1)
• GPU: 2x NVIDIA RTX PRO 6000 Blackwell Workstation Edition (SM120, 96 GB VRAM each)
• Driver: 580.126.18
• CUDA Toolkit: 13.2 (host), 13.0.0 (Docker build)
• PyTorch: 2.11.0+cu130
• CUTLASS: 4.4.2

Describe the bug

The upstream Dockerfile and docker buildx bake config produce images that do not include NVFP4 CUTLASS kernels for SM120 (Blackwell). The default TORCH_CUDA_ARCH_LIST uses 12.0+PTX which generates virtual PTX but not real SM120 machine code. CMake's cuda_archs_loose_intersection() requires 12.0a or 12.0f to match the NVFP4 kernel gate — 12.0+PTX does not satisfy this.

This means any user building the official Docker image for Blackwell gets an image where:

Kernel	Expected	Actual
nvfp4_scaled_mm_sm120_kernels.cu	Built (ENABLE_NVFP4_SM120=1)	Skipped
nvfp4_blockwise_moe_kernel.cu	Built (ENABLE_CUTLASS_MOE_SM120=1)	Skipped
nvfp4_experts_quant.cu	Built	Skipped
nvfp4_kv_cache_kernels.cu	Built	Skipped
activation_nvfp4_quant_fusion_kernels.cu	Built	Skipped
scaled_mm_c3x_sm120.cu	Built (ENABLE_SCALED_MM_SM120=1)	Built ✓ (uses 12.0f which +PTX does satisfy for >=13.0)

The CMake log confirms this during build:

-- Building NVFP4 for archs: 12.0f     ← SM120 block (lines 915-941)
-- Not building NVFP4 as no compatible archs were found.  ← SM100 block (expected, no Hopper)

With the default 12.0+PTX, only the second message appears for both blocks — SM120 NVFP4 is silently skipped.

Root cause

CMakeLists.txt lines 915-918:

if(${CMAKE_CUDA_COMPILER_VERSION} VERSION_GREATER_EQUAL 13.0)
    cuda_archs_loose_intersection(FP4_ARCHS "12.0f" "${CUDA_ARCHS}")
else()
    cuda_archs_loose_intersection(FP4_ARCHS "12.0a;12.1a" "${CUDA_ARCHS}")
endif()

12.0+PTX maps to virtual arch compute_120 + PTX, but cuda_archs_loose_intersection with 12.0f requires a real SM code target (sm_120). The +PTX suffix in TORCH_CUDA_ARCH_LIST does not produce an f or a gencode — it produces -gencode arch=compute_120,code=compute_120 (virtual only), not -gencode arch=compute_120,code=sm_120.

Steps to reproduce

# Default Dockerfile arch list: '7.5 8.0 8.6 8.9 9.0 10.0 11.0 12.0+PTX'
docker buildx build --build-arg CUDA_VERSION=13.0.0 -f docker/Dockerfile .
# CMake output: "Not building NVFP4 as no compatible archs were found." (for BOTH blocks)

# Fixed:
docker buildx build --build-arg "torch_cuda_arch_list=12.0a" --build-arg CUDA_VERSION=13.0.0 -f docker/Dockerfile .
# CMake output: "Building NVFP4 for archs: 12.0a"

What should change

1. docker/docker-bake.hcl and docker/Dockerfile: Change the default torch_cuda_arch_list from 12.0+PTX to 12.0 (or 12.0a). The +PTX suffix is unnecessary for the highest arch — nvcc already embeds PTX for the highest listed real arch. This single change enables NVFP4 CUTLASS kernels for SM120 in all official Docker builds.

2. CI/test coverage: Add SM120 NVFP4 kernel validation to the Blackwell CI matrix. The existing tests (test_nvfp4_quant.py, test_nvfp4_scaled_mm.py, test_nvfp4_moe.py) all pass on SM120 (146/146) but are not gated on whether the kernels were actually compiled into the image.

3. Build-time assertion: CMake should warn or error when building for SM120+ without NVFP4 support, since FP4 tensor cores are a primary feature of Blackwell. Currently it silently falls through to the "not building" path with no indication that the user's arch string is wrong.

Verification on SM120

Built from main with torch_cuda_arch_list=12.0a and ran full validation:

Kernel tests (all passing on 2x RTX PRO 6000 BWE):

Test	Count	Status
test_nvfp4_quant.py	50	✅
test_nvfp4_scaled_mm.py	12	✅
test_nvfp4_moe.py	84	✅

E2E inference (NemotronH hybrid Mamba2+Attention+MoE, NVFP4 quantized):

Model	Config	Memory	Result
nvidia/NVIDIA-Nemotron-3-Nano-30B-A3B-NVFP4	Single GPU	18.66 GiB	✅ Coherent output
nvidia/NVIDIA-Nemotron-3-Super-120B-A12B-NVFP4	TP=2	~67 GiB/GPU	✅ Coherent output

POC Docker image

Built and pushed a working image with the fix applied:

ghcr.io/zeryx/vllm:nvfp4-sm120-db9a84e0c

Based on nvidia/cuda:13.0.0-base-ubuntu24.04, vLLM main @ db9a84e, torch_cuda_arch_list=12.0a. Includes all NVFP4 SM120 CUTLASS kernels. Requires --privileged on Blackwell due to driver 580.x NVML limitations.

# Verify NVFP4 ops exist in the image
docker run --gpus all --privileged --rm --entrypoint python3 \
  ghcr.io/zeryx/vllm:nvfp4-sm120-db9a84e0c \
  -c "from vllm._custom_ops import cutlass_scaled_fp4_mm, cutlass_fp4_moe_mm; print('NVFP4 OK')"

# Serve Nemotron-3-Nano
docker run --gpus all --privileged -p 8000:8000 \
  -v /path/to/hf_cache:/root/.cache/huggingface \
  ghcr.io/zeryx/vllm:nvfp4-sm120-db9a84e0c \
  --model nvidia/NVIDIA-Nemotron-3-Nano-30B-A3B-NVFP4 \
  --max-model-len 4096 --trust-remote-code

Additional context

The same +PTX vs real arch issue likely affects other SM120-gated kernel paths (ENABLE_CUTLASS_MOE_SM120, MLA kernels) in official images. The docker-bake.hcl default of "8.0 8.9 9.0 10.0 11.0 12.0" (no +PTX) is actually correct — but the Dockerfile's own default '7.5 8.0 8.6 8.9 9.0 10.0 11.0 12.0+PTX' overrides it when building without bake.

Fork with patched Dockerfile: https://github.com/zeryx/vllm/tree/nvfp4-sm120-docker

[claude]

Claude Code Review

This pull request is from a fork — automated review is disabled. A repository maintainer can comment @claude review to run a one-time review.

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[gemini-code-assist]

Code Review

This pull request introduces a new Dockerfile specifically for Blackwell architectures (sm120), utilizing CUDA 13.0.2 and Python 3.12. Feedback suggests that instead of creating a separate file, these changes should be integrated into the main Dockerfile to prevent maintenance overhead and configuration drift. Furthermore, the torch_cuda_arch_list needs to be updated in multiple build stages to remove the +PTX suffix from version 12.0, ensuring that real machine code is generated as intended.

[zeryx]

This should also work for SM121 but I don't have a dgx spark to test

If someone has a DGX Spark and can run this script with my built docker image above (or build from source themselves) and could verify if this works that would be appreciated 🙏
https://gist.github.com/zeryx/a19a32e4efc6fd9c3bb0fc9769b46e3e

[dkopko]

I have a DGX Spark and could assist, but when I tried to run the script, it looks like the docker image is the wrong architecture:

Status: Downloaded newer image for ghcr.io/zeryx/vllm:nvfp4-sm120-f59929f59
WARNING: The requested image's platform (linux/amd64) does not match the detected host platform (linux/arm64/v8) and no specific platform was requested
exec /usr/local/bin/vllm: exec format error

It will take me some time to try the alternative method you gave.

[ricky-chaoju]

Quick update from a DGX Spark: I couldn't run the published GHCR image directly because it appears to be linux/amd64, while the Spark is linux/arm64. I built the current PR head locally (4ade685) and the resulting image starts up correctly on the machine.

The machine reports the GPU as NVIDIA GB10 with compute capability 12.1 and driver 580.126.09.

Inside the container, vllm collect-env detects the GPU and CUDA correctly:

GPU models and configuration : GPU 0: NVIDIA GB10
Is CUDA available            : True
PyTorch version              : 2.11.0+cu130
vLLM Version                 : 0.20.2rc1.dev54+g4ade68598

For reference, the image reports vLLM build flags with CUDA Archs: 12.0, while PyTorch sees the actual device capability as (12, 1).

I also checked that the NVFP4 custom ops are importable:

docker run --rm --gpus all --privileged --entrypoint python3 vllm-pr41738-sm120 \
  -c "from vllm._custom_ops import cutlass_scaled_fp4_mm, cutlass_fp4_moe_mm; print('NVFP4 OK')"

Output:

NVFP4 OK

I haven't run the full E2E/model validation script yet, but this confirms the PR can be built locally for DGX Spark arm64, that CUDA is detected on the GB10, and that the NVFP4 custom ops are present/importable.

[ricky-chaoju]

One follow-up after taking another pass: my DGX Spark check above only covers the local linux/arm64 Docker build, CUDA detection on GB10, and NVFP4 custom-op availability.

I noticed a separate concern in the LoRA part of this PR. CutlassExpertsFp4 now mixes in LoRAExpertsMixin, so supports_lora() becomes true, but its apply() path does not appear to consume self._lora_context or call apply_w13_lora() / apply_w2_lora().

That seems risky because the LoRA wrapper can now allow this FP4 Cutlass expert path, while the forward path may not apply the LoRA deltas. The wrapper assertion text says quantized MoE experts should both mix in LoRAExpertsMixin and consume self._lora_context in apply().

The Docker / SM12x NVFP4 build piece still looks good from the DGX Spark validation, but I think the LoRA change should either wire LoRA into the Cutlass FP4 apply path or keep this backend unsupported for LoRA so it falls back to an existing LoRA-capable path.

[mergify]

This pull request has merge conflicts that must be resolved before it can be
merged. Please rebase the PR, @zeryx.

https://docs.github.com/en/pull-requests/collaborating-with-pull-requests/working-with-forks/syncing-a-fork

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