[XPU][MoE] Add WNA16 oracle backend for GPTQ sym-int4 (xpu_fused_moe)

[jasonboukheir]

Summary

Adds a working W4A16 (INT4 weights, FP16 activations) MoE path for Intel XPU, routing through vllm-xpu-kernels's fused_moe_interface.xpu_fused_moe(is_int4=True). Part of RFC #33214 — the XPU off-IPEX migration to vllm-xpu-kernels. This is the W4A16 MoE milestone; pairs with the existing INCXPULinearMethod to give end-to-end attention + MoE on Intel GPUs without IPEX.

AI assistance was used to draft this PR; the submitter has reviewed every changed line and run the tests below.

Commits

1. xpu_moe: add XPUExpertsWNA16 wired to xpu_fused_moe(is_int4=True) — new XPUExperts subclass with is_int4=True; pure addition.
2. xpu_moe: register WNA16MoEBackend.XPU in the int_wna16 oracle — adds the WNA16MoEBackend.XPU enum, the XPU branch in _get_priority_backends()/backend_to_kernel_cls/make_wna16_moe_kernel/convert_to_wna16_moe_kernel_format, plus a _process_weights_xpu helper. Pure addition; the Marlin paths are untouched.
3. inc: add INCXPUMoEMethod for W4A16 sym int4 MoE on XPU — new INCXPUMoEMethod(FusedMoEMethodBase) companion to INCXPULinearMethod. Loads GPTQ-format MoE checkpoints ([E, K/8, 2N] int32) and repacks them in process_weights_after_loading to the [E, 2N, K/2] uint8 layout the XPU kernel wants. apply_xpu_w4a16_quant_layer returns it for FusedMoE layers.
4. inc: parse GPTQModel \dynamic` field into extra_config— GPTQModel checkpoints (e.g. Qwen3.6-A3B GPTQ-Int4) put per-module overrides underdynamic (-:skip /+:override) instead ofextra_config. Translates them into INC's existing extra_configregex path soget_layer_config()` works unchanged.
5. inc: auto-claim vanilla GPTQ sym int4 on XPU — extends override_quantization_method so on XPU only, vanilla GPTQ sym-int4 desc_act=false checkpoints (which gptq_marlin/awq_marlin decline because they gate on CUDA/CPU, and which moe_wna16 can't run because its Triton kernels don't execute on Intel GPUs) get claimed by INC. This is the only behaviour change in the PR; if reviewers prefer gated/explicit opt-in, this commit can be dropped and the rest of the PR still works.

Layout note

GPTQ MoE checkpoints store weights as [E, K/8, 2N] int32 with sequential int4 nibbles along the input dim. xpu_fused_moe(is_int4=True) wants [E, 2N, K/2] uint8. The conversion is transpose(1, 2).contiguous().view(torch.uint8) — no Python-side nibble shuffling. The kernel converts uint4b8 → s4 internally via implement_zp, so symmetric int4 zero points are handled in the kernel and we don't need to materialize qzeros.

XPUExpertsWNA16 is currently routed only by INC. The WNA16MoEBackend.XPU oracle entry is generic, so future XPU quant methods (AutoRound, compressed_tensors, etc.) can plug into the same backend.

Empirical validation

Tested against palmfuture/Qwen3.6-35B-A3B-GPTQ-Int4 on an Intel Arc Pro B70 (24 GiB):

• Model resident: 20.15 GiB
• KV cache headroom: ~251 k tokens (FP16; with turboquant_k3v4_nc on a separate branch it scales further — not part of this PR)
• Decode throughput, single stream:
  • Eager: ~28 tok/s
  • torch.compile + XPU graph capture: ~58 tok/s (matches llama.cpp Q4_K_M's hand-tuned SYCL pipeline on the same model + GPU)

Numbers from the published GHCR image; full investigation in our internal perf notes.

Test plan

• All 5 commits cherry-pick clean onto upstream/main with DCO sign-off.
• Static review of imports and the diff against the current upstream tree (kInt4Static, kInt4StaticGroupScale, FusedMoEMethodBase, int4_w4a16_moe_quant_config, FusedMoeWeightScaleSupported, select_wna16_moe_backend, make_wna16_moe_kernel, convert_to_wna16_moe_kernel_format all resolve).
• End-to-end inference run on Arc Pro B70 against palmfuture/Qwen3.6-35B-A3B-GPTQ-Int4: model loads, generates coherent text, sustains the throughput numbers above.
• Pre-commit / CI on this PR (will run automatically on push).

Reviewers: @yiliu30 — given your work on INCXPULinearMethod (#37986) and the in-flight INC refactor (#40601), curious whether you'd prefer this MoE method live in the new inc/schemes/ package layout from #40601 once that lands. Happy to rebase or split.

🤖 AI assistance disclosure: drafted with Claude (Anthropic).

[claude]

Claude Code Review

This pull request is from a fork — automated review is disabled. A repository maintainer can comment @claude review to run a one-time review.

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[gemini-code-assist]

Code Review

This pull request introduces support for W4A16 INT4-symmetric Mixture of Experts (MoE) on Intel XPU platforms. Key changes include the addition of the XPUExpertsWNA16 class to handle the fused MoE kernel, updates to the WNA16 MoE oracle to prioritize the XPU backend when running on Intel hardware, and the implementation of INCXPUMoEMethod within the Intel Neural Compressor (INC) quantization framework. The changes also include weight repacking logic to convert standard GPTQ-format weights into the specific layout required by the XPU kernels. I have no feedback to provide.

[jikunshang]

Thanks for contributing, this is very close to what I planned. before land this, but support via gptq_marlin. before land this, I prefer to add xpu int4 linear support first, this is pending on #38288

[yiliu30]

Hi @jasonboukheir, thanks a lot for the contribution! For the INC side, placing this MoE method under the new inc/schemes/ layout once #40601 lands sounds great and keeps everything aligned with the refactor.

[jasonboukheir]

Thanks both — branch is now rebased on the latest upstream main (no content changes, just modernized commit base).

Quick status on the two threads:

@yiliu30 — to validate the relocation actually works against #40601, I prototyped it on a local integration branch: jasonboukheir/vllm@integration. On that branch the MoE method lives at vllm/model_executor/layers/quantization/inc/schemes/xpu_w4a16_moe.py (mirroring inc/schemes/xpu_w4a16_linear.py), and INCWna16Scheme.get_moe_method() dispatches the XPU bits=4 sym=true case to it instead of the current UnquantizedFusedMoEMethod placeholder. The two INCConfig deltas (GPTQModel dynamic parsing in from_config, and the XPU GPTQ auto-claim in override_quantization_method) cleanly fit into the new inc/inc.py. I'll lift this into the upstream PR once #40601 lands so reviewers don't have to chase a moving target.

@jikunshang — agreed on waiting for #38288 to provide the unified XPU int4 linear path; happy to rebase this MoE PR on top once it merges. The current INCXPULinearMethod in this PR is the temporary linear companion that pairs with this MoE method end-to-end on Arc Pro B70 today (i.e. attention via INCXPULinearMethod + MoE via INCXPUMoEMethod); when #38288 lands we can drop the linear half and reroute through gptq_marlin/auto_gptq if that's the preferred direction. Want to keep this PR open as a tracking parent, or close and reopen against the post-#38288 base?

🤖 AI assistance disclosure: drafted with Claude (Anthropic).

[jikunshang]

hi @jasonboukheir can you rebase?

[jasonboukheir]

hi @jasonboukheir can you rebase?

yes I will, planning on having some time this weekend to rebase and retest!

[mergify]

This pull request has merge conflicts that must be resolved before it can be
merged. Please rebase the PR, @jasonboukheir.

https://docs.github.com/en/pull-requests/collaborating-with-pull-requests/working-with-forks/syncing-a-fork

[jasonboukheir]

Rebased onto current main and revalidated on Arc B70 PRo (1× XPU, Qwen3.6-35B-A3B-GPTQ-Int4, vllm bench latency defaults, max_num_seqs=8):

• Eager: 7.573 s/iter → ~16.9 tok/s/req
• Compiled (PIECEWISE cudagraphs, sizes [1,2,4,8]): 1.869 s/iter → ~68.5 tok/s/req — ~4.05× speedup

FULL cudagraph mode still crashes due to FA2 + SYCL-graph incompatibility on XPU; PIECEWISE sidesteps it (attention stays eager). torch.compile cold cost is ~50s, cached afterwards.

Branch was force-pushed (rebase + 4 fix commits on top to keep up with recent make_wna16_moe_kernel / INCMoEMethod signature churn on main).

[jikunshang]

I try to pull your branch and run some test on my side. seems there are some accuracy issue when running python3 examples/basic/offline_inference/generate.py --model Qwen/Qwen3-30B-A3B-GPTQ-Int4 --enforce-eager --quantization inc
can you double check?
besides, I think we can add auto gptq support.

[jasonboukheir]

Thanks for catching this — reproduced and root-caused. Pushed fix in 0e526e7.

Root cause: vanilla AutoGPTQ checkpoints like Qwen/Qwen3-30B-A3B-GPTQ-Int4 carry neither GPTQModel's dynamic nor AutoRound's extra_config, so INC's get_layer_config classified every linear as int4 — including the MoE router mlp.gate, which the checkpoint actually stores as a plain float .weight. The weight loader silently left INC's registered qweight/scales/qzeros uninitialised and the router ran on garbage, breaking expert selection.

Fix: override INCConfig.maybe_update_config to scan the safetensors metadata and inject exact-match skip entries into extra_config for any module whose .weight is stored unquantized (no sibling .qweight). Mirrors AutoGPTQConfig.maybe_update_config in spirit, but inverts the polarity — builds a skip set instead of a quantize set, since the AutoGPTQ convention is "anything with .qweight is quantized". User-spelled dynamic/extra_config entries are never overwritten. Also extracted _unquantized_method_for so the early-return in get_quant_method dispatches UnquantizedFusedMoEMethod / UnquantizedEmbeddingMethod / UnquantizedLinearMethod by layer type — previously the unconditional UnquantizedLinearMethod would have crashed on VocabParallelEmbedding (no embedding() impl).

Verified end-to-end on Arc Pro B70, your exact repro:

python examples/basic/offline_inference/generate.py \
  --model Qwen/Qwen3-30B-A3B-GPTQ-Int4 --enforce-eager --quantization inc

Prompt: 'Hello, my name is'
Generated text: ' Alex. I have a question about the concept of the "unmoved mover"
  in Aristotle's philosophy. […]'

Prompt: 'The president of the United States is'
Generated text: ' the head of government of the United States, and is the
  commander-in-chief of the United States Armed Forces. […]'

Prompt: 'The capital of France is'
Generated text: ' Paris. The capital of the United Kingdom is London. The capital
  of Brazil is Brasília. […]'

Prompt: 'The future of AI is'
Generated text: ' not just about the technology itself but about how it is
  integrated into human systems and societies. […]'

Dispatch-level tests on the live checkpoint metadata: 7/7 pass — mlp.gate → unquantized linear; self_attn.qkv_proj → INCXPULinearMethod; mlp.experts → int4 classified; model.embed_tokens (VPE) → None → falls back to UnquantizedEmbeddingMethod; lm_head → unquantized linear; partial-dynamic (+: overrides only) merges injected skips without clobbering user entries; full-dynamic (-: skip path) unchanged. 243 skip entries injected for Qwen3-30B-A3B (gates, lm_head, embed_tokens, layernorms); expert sub-layers (mlp.experts.*.{gate,up,down}_proj) correctly not skipped.

GPTQModel dynamic-path regression (palmfuture/Qwen3.6-35B-A3B-GPTQ-Int4): outputs byte-identical to pre-fix — the -: skip path is preserved.

besides, I think we can add auto gptq support.

INC's override_quantization_method already auto-claims quant_method == "gptq" on XPU when the user passes --quantization inc or omits --quantization (lands the linear path on INCXPULinearMethod/oneDNN int4_gemm_w4a16 and the MoE path on INCXPUMoEMethod/vllm-xpu-kernels). So vanilla AutoGPTQ already routes through this path — this fix is what makes that routing produce correct output for AutoGPTQ MoE checkpoints that leave the router unquantized. Happy to add an explicit auto-gptq quant-method alias if you'd prefer a more explicit routing story.

🤖 AI assistance disclosure: fix + tests drafted with Claude (Anthropic), reviewed and validated end-to-end by me.

[jikunshang]

I think we can revert inc.py, everything can be done in other 2 files. currently this command works on my side
python3 examples/basic/offline_inference/generate.py --model Qwen/Qwen3-30B-A3B-GPTQ-Int4 --enforce-eager
cc @yiliu30