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[Hardware] DeepGEMM MoE: extend device gates to SM 12.x consumer Blackwell#41062

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[Hardware] DeepGEMM MoE: extend device gates to SM 12.x consumer Blackwell#41062
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Summary

Two parallel device-capability gates currently exclude SM 12.x (consumer Blackwell — RTX 50-series and GB10 / DGX Spark) from the DeepGEMM-backed MXFP4 MoE path:

Gate 1: CudaPlatformBase.support_deep_gemm() (vllm/platforms/cuda.py)

return cls.is_device_capability(90) or cls.is_device_capability_family(100)

Gate 2: DeepGemmFP4Experts._supports_current_device() (vllm/model_executor/layers/fused_moe/experts/deep_gemm_moe.py)

return (
    is_deep_gemm_supported()
    and current_platform.is_device_capability_family(100)
)

Together these hard-code SM 100 / 100a / 103 only — dropping SM 120 / 121 even when DeepGEMM (or a fork) provides the kernels. On dual DGX Spark / SM 121 hardware today both gates short-circuit to False, so any V4-Flash deployment using --moe-backend deep_gemm raises:

ValueError: Mxfp4 MoE backend 'DEEPGEMM_MXFP4' does not support
the deployment configuration since kernel does not support
current device cuda.

Fix

This PR widens both gates to also accept is_device_capability_family(120), matching the comment intent in support_deep_gemm ("Hopper and Blackwell GPUs are supported"). The kernel-level fallback to tcgen05.* is still guarded by DeepGEMM's own dispatch, which now has paths for SM 12.x in active forks (e.g. jasl/DeepGEMM per #40899).

Test plan

  • Verified locally on dual NVIDIA GB10 / SM 121 (DGX Spark): with this change is_deep_gemm_supported() == True and DeepGemmFP4Experts._supports_current_device() == True. The Mxfp4 oracle no longer raises on backend lookup.
  • Engine-init progresses past these gates; subsequent failures (if DeepGEMM lacks SM 12.x kernel implementations for specific ops the deployment uses) now surface as proper kernel-level errors rather than being masked behind the device-capability check, which is the correct UX.
  • No SM 90 (Hopper) / SM 100 (datacenter Blackwell) / ROCm path changes.

Cross-platform table

Device Pre-PR Post-PR
SM 80 / 86 / 89 (Ampere/Ada) rejected (correct) rejected (unchanged)
SM 90 (Hopper) accepted accepted
SM 100 / 103 (datacenter Blackwell) accepted accepted
SM 120 / 121 (consumer Blackwell) rejected accepted
ROCm unaffected unaffected

Companion PRs

cc @mgoin @tlrmchlsmth @LucasWilkinson — small follow-up to the SM 12.x story.

…kwell

Two parallel device-capability gates currently exclude SM 12.x
(consumer Blackwell — RTX 50-series and GB10 / DGX Spark) from the
DeepGEMM-backed MXFP4 MoE path:

1. `CudaPlatformBase.support_deep_gemm()` only accepts SM 90 (Hopper)
   and SM 100+ family (datacenter Blackwell), so `is_deep_gemm_supported()`
   returns False on SM 120/121.

2. `DeepGemmFP4Experts._supports_current_device()` further requires
   `is_device_capability_family(100)`, so even with the platform gate
   relaxed it still rejects SM 12.x.

Hardware reality: SM 120 / SM 121 use the same MMA family as datacenter
Blackwell for FP4 / FP8 matmuls (SM 10.x uses `tcgen05.*`, SM 12.x uses
`mma.*`, but at the Python-level dispatch they share the DeepGEMM MoE
oracle). For kernels DeepGEMM (or its forks like jasl/DeepGEMM with
SM 120 native ports) compile for SM 12.x, the wrappers should accept
the device.

This PR widens both gates to also accept `is_device_capability_family(120)`,
matching the comment intent in `support_deep_gemm` ("Hopper and Blackwell
GPUs are supported"). The kernel-level fallback to `tcgen05.*` is still
guarded by DeepGEMM's own dispatch, which now has paths for SM 12.x in
recent forks.

Verified locally on dual NVIDIA GB10 / SM 121 (DGX Spark): with this
change `is_deep_gemm_supported() == True` and `DeepGemmFP4Experts.
_supports_current_device() == True`. (Boot still requires DeepGEMM
itself to provide SM 12.x kernels for the specific operations the
deployment uses, which is independent of these vLLM-side gates.)

Companion to vllm-project#41028 (Triton MXFP4 SM 12.x device-range fix) and vllm-project#40923
(Marlin SM 12.x cubin).

Signed-off-by: Tony Liu <tonyliu0512@gmail.com>
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Code Review

This pull request extends DeepGEMM support to consumer Blackwell GPUs (SM 12x) by updating device capability checks in the MoE layers and CUDA platform logic. Feedback suggests simplifying the architecture checks by using has_device_capability(100), which covers both SM 10.x and 12.x, and highlights the need to update the auto-disablement logic in vllm/utils/deep_gemm.py to ensure consistency for consumer Blackwell devices.

Comment on lines +357 to 360
return is_deep_gemm_supported() and (
current_platform.is_device_capability_family(100)
or current_platform.is_device_capability_family(120)
)
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high

This check can be simplified by using has_device_capability(100), which correctly identifies all Blackwell-family GPUs (including both SM 10.x and 12.x) while excluding Hopper (SM 9.0). This is more idiomatic in vLLM for checking minimum architecture requirements.

        return (is_deep_gemm_supported()
                and current_platform.has_device_capability(100))

Comment thread vllm/platforms/cuda.py
Comment on lines +550 to +552
return (cls.is_device_capability(90)
or cls.is_device_capability_family(100)
or cls.is_device_capability_family(120))
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high

The logic for checking Blackwell support can be simplified using has_device_capability(100), which covers both SM 10.x and 12.x (and matches the "SM 100+" description in the docstring).

Important: Please ensure that vllm/utils/deep_gemm.py::should_auto_disable_deep_gemm is also updated to include SM 12.x (e.g., by using has_device_capability(100) there as well). Currently, it only checks for family 100, which means consumer Blackwell GPUs will bypass the accuracy-related auto-disablement for specific models (like Qwen 3.5) known to have issues with DeepGEMM's E8M0 scale format on Blackwell.

        return cls.is_device_capability(90) or cls.has_device_capability(100)

@Harry-Chen
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I don't think deepgemm has supported sm12x yet? deepseek-ai/DeepGEMM#236

@tonyliu312
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You're right — DeepGEMM upstream hasn't landed SM 12.x kernels yet (I filed deepseek-ai/DeepGEMM#236 myself a few days ago).

The motivation here is the in-flight jasl/DeepGEMM fork (referenced in #40899), which does have native SM 120 implementations of:

  • sm120_tf32_hc_prenorm_gemm (V4 mHC)
  • sm120_fp8_einsum
  • sm120_fp8_paged_mqa_logits

That work is being upstreamed into DeepGEMM proper. I traced the remaining FP4 GEMM / attention / einsum gaps in #41063 (which cross-links jasl's WIP cleanup of #40899).

Two ways to make this PR safer for the current "stock-DeepGEMM" majority:

(a) Probe at runtime — turn _supports_current_device into a feature-test that tries to dispatch a dummy kernel and falls through if the SM 12.x build is missing, instead of a static capability gate. Same effect once kernels exist; no false-positive on stock builds.

(b) Hold the PR until DeepGEMM upstream has SM 12.x kernels merged — happy to convert it to draft.

I'd suggest (a) — it lets pip install deepgemm users on Spark / RTX 50 silently fall through to Triton/Marlin today, and silently switch on the moment the kernels land. Will push that change tonight if it sounds right; otherwise will mark it Draft.

cc @jasl @WoosukKwon

@tonyliu312
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@Harry-Chen following up on the SM 12.x DeepGEMM concern: I dropped a coordination note on deepseek-ai/DeepGEMM#236 earlier today, asking jasl directly whether he plans to upstream the ds4-sm120 fork's sm120_tf32_hc_prenorm_gemm kernel (hardware-verified on dual GB10: err_d=0.06, rel_err_sqsum=7.3e-7 against PyTorch reference; in active production use under vllm-project/vllm#40991). If jasl declines or wants help, I offered to do the porting + cross-arch validation myself.

So the current dependency chain for this PR is concrete and tracked, not vapor:

  1. SM 12.x silicon mHC kernel exists today as the jasl fork — verified.
  2. Either jasl upstreams it, or I will (depending on his answer in Mention FastChat-vLLM integration in README #236).
  3. Once that lands in deepseek-ai/DeepGEMM main, this gate flip in vLLM becomes a no-op default-on for SM 12.x users, no risk to other arches (the DeepGEMM-side dispatch is the actual SM 12.x guard).

If you'd prefer this PR wait on the DeepGEMM-side kernel landing first (rather than gate-flip-now / kernel-later), happy to mark it draft and revisit when #236 closes — let me know which order you want.

@AshtonVaughan
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Validated on RTX 5090 (SM 12.0). Author tested SM 12.1 GB10/DGX Spark, this confirms the SM 12.0 RTX 50-series side.

Replicating both gates with the platform-reported capability:

5090 reports SM 12.0

is_device_capability(90):         False
is_device_capability_family(100): False
is_device_capability_family(120): True

Gate 1 (support_deep_gemm):    old=False, new=True
Gate 2 (DeepGemmFP4Experts):   old=False, new=True

Both gates correctly admit the 5090 after the patch and correctly rejected it before. Comment intent ("Hopper and Blackwell GPUs are supported") now matches behaviour.

DeepGEMM forks with SM 12.x kernel paths (jasl/DeepGEMM #40899) are gated by DeepGEMM's own dispatch downstream, so this PR is purely a vLLM-side admission - safe.

LGTM.

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