[Kernel] OAITritonExperts MXFP4: include SM 12.x in supported device range#41028
[Kernel] OAITritonExperts MXFP4: include SM 12.x in supported device range#41028tonyliu312 wants to merge 1 commit intovllm-project:mainfrom
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Code Review
This pull request expands the device capability checks to support Blackwell architecture (SM 100+, SM 120/121) and ROCm gfx942/950 by increasing the upper bound to SM 13.0. The review feedback identifies an inconsistency in the documentation comments which incorrectly state support for SM 8.0+, whereas the implementation correctly restricts it to SM 9.0+.
| # (9,0) <= cap < (13,0) covers CUDA SM90 (Hopper), SM100+ (datacenter | ||
| # Blackwell), SM120/SM121 (consumer Blackwell — RTX 50-series, GB10 | ||
| # /DGX Spark) and ROCm gfx942/gfx950 (which map to 9.4/9.5). The Triton | ||
| # MXFP4 kernels are JIT-compiled and run on any sm>=80 the Triton | ||
| # backend supports; the upper bound just excludes archs where the | ||
| # comment-author was not yet sure. |
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The comment added here is inconsistent with the code logic and the PR's stated intent. It mentions that the kernels run on any sm>=80, but the code enforces sm>=90 (via (9, 0) <= ...). The PR description also explicitly states that SM 8x (Ampere) is rejected because the kernels do not target it. The comment should be updated to sm>=90 to be consistent with the implementation.
| # (9,0) <= cap < (13,0) covers CUDA SM90 (Hopper), SM100+ (datacenter | |
| # Blackwell), SM120/SM121 (consumer Blackwell — RTX 50-series, GB10 | |
| # /DGX Spark) and ROCm gfx942/gfx950 (which map to 9.4/9.5). The Triton | |
| # MXFP4 kernels are JIT-compiled and run on any sm>=80 the Triton | |
| # backend supports; the upper bound just excludes archs where the | |
| # comment-author was not yet sure. | |
| # (9,0) <= cap < (13,0) covers CUDA SM90 (Hopper), SM100+ (datacenter | |
| # Blackwell), SM120/SM121 (consumer Blackwell — RTX 50-series, GB10 | |
| # /DGX Spark) and ROCm gfx942/gfx950 (which map to 9.4/9.5). The Triton | |
| # MXFP4 kernels are JIT-compiled and run on any sm>=90 the Triton | |
| # backend supports; the upper bound just excludes archs where the | |
| # comment-author was not yet sure. |
| # (9,0) <= cap < (13,0) covers CUDA SM90 (Hopper), SM100+ (datacenter | ||
| # Blackwell), SM120/SM121 (consumer Blackwell — RTX 50-series, GB10 | ||
| # /DGX Spark) and ROCm gfx942/gfx950 (which map to 9.4/9.5). The Triton | ||
| # MXFP4 kernels are JIT-compiled and run on any sm>=80 the Triton | ||
| # backend supports; the upper bound just excludes archs where the | ||
| # comment-author was not yet sure. |
There was a problem hiding this comment.
The comment added here is inconsistent with the code logic and the PR's stated intent. It mentions that the kernels run on any sm>=80, but the code enforces sm>=90 (via (9, 0) <= ...). The PR description also explicitly states that SM 8x (Ampere) is rejected because the kernels do not target it. The comment should be updated to sm>=90 to be consistent with the implementation.
| # (9,0) <= cap < (13,0) covers CUDA SM90 (Hopper), SM100+ (datacenter | |
| # Blackwell), SM120/SM121 (consumer Blackwell — RTX 50-series, GB10 | |
| # /DGX Spark) and ROCm gfx942/gfx950 (which map to 9.4/9.5). The Triton | |
| # MXFP4 kernels are JIT-compiled and run on any sm>=80 the Triton | |
| # backend supports; the upper bound just excludes archs where the | |
| # comment-author was not yet sure. | |
| # (9,0) <= cap < (13,0) covers CUDA SM90 (Hopper), SM100+ (datacenter | |
| # Blackwell), SM120/SM121 (consumer Blackwell — RTX 50-series, GB10 | |
| # /DGX Spark) and ROCm gfx942/gfx950 (which map to 9.4/9.5). The Triton | |
| # MXFP4 kernels are JIT-compiled and run on any sm>=90 the Triton | |
| # backend supports; the upper bound just excludes archs where the | |
| # comment-author was not yet sure. |
…range
The Triton MXFP4 fused-MoE experts (`OAITritonExperts` and
`OAITritonMxfp4ExpertsMonolithic`) gate by
return (9, 0) <= (cap.major, cap.minor) < (11, 0)
so consumer Blackwell (SM 12.0 / SM 12.1, RTX 50-series and GB10/DGX
Spark) is rejected at runtime with
ValueError: Mxfp4 MoE backend 'TRITON' does not support the
deployment configuration since kernel does not support current
device cuda.
The Triton kernels themselves compile and run fine on SM 12.x — they
are pure JIT and don't use SM 9.0-only `wgmma` or SM 10.x-only
`tcgen05.*` instructions. The upper bound just predates the SM 12.x
Blackwell variants shipping. Bumping the bound to `(13, 0)` lets
SM 100/103/120/121 all use this path, matching the existing SM 100+
Blackwell intent stated in the comment.
Verified locally on dual NVIDIA GB10 (DGX Spark, SM 12.1):
- `_supports_current_device()` returns True after the bump
- Engine init progresses past the previous gate (subsequent failures,
if any, are model-specific and unrelated to this gate, e.g. SILU
vs SwiGLU activation requirement of `OAITritonExperts`).
Same change applied to both occurrences in this file (line 658 for
the fused experts, line 1072 for the monolithic experts).
Signed-off-by: Tony Liu <tonyliu0512@gmail.com>
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Thanks @gemini-code-assist — fixed in |
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Thank you for the update, @tonyliu312. The clarification in the code comments regarding the lower bound is helpful for maintainability. Since the logic changes have been verified on SM 12.x hardware and the gate correctly allows the intended devices while maintaining the necessary constraints for the Triton MXFP4 kernels, this looks good. |
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Validated the gate logic on RTX 5090 (consumer Blackwell SM 12.0). Author tested SM 12.1 GB10/DGX Spark, this adds the SM 12.0 RTX 50-series side. Sanity sweep across SM caps:
One minor note. The comment block now reads LGTM on the gate change itself. The Triton MXFP4 kernels are pure JIT and the consumer Blackwell tensor cores are a strict superset of the SM 9.0 instructions they rely on, so the wider gate is safe in practice. |
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Summary
BaseOAITritonExperts._supports_current_device(and itsOAITritonMxfp4ExpertsMonolithictwin) currently caps the CUDA capability at< (11, 0):That excludes consumer Blackwell — SM 12.0 / SM 12.1 (RTX 50-series and GB10 / DGX Spark) — even though those parts execute the same Triton MXFP4 kernels just fine. On SM 12.x today the engine fails to start with:
This PR bumps the upper bound to
< (13, 0), which lets SM 100 / 103 / 120 / 121 all reach the Triton path. The kernels are pure Triton JIT — no SM 9.0-onlywgmmaor SM 10.x-onlytcgen05.*instructions — so the wider gate is safe.The same change is applied to both
BaseOAITritonExperts(L658) andOAITritonMxfp4ExpertsMonolithic(L1072).Test plan
_supports_current_device()returnsTrueafter the bump and engine init progresses past this gate.OAITritonExperts, which only supports SwiGLU) are model-specific and unrelated to this gate — they manifest as properkernel does not support …errors after this PR, instead of being masked behind the device-capability gate.Cross-platform notes
cc @mgoin @tlrmchlsmth @LucasWilkinson — small follow-up to the SM 12.x story alongside #40923.