[Bugfix][Spec-Decode] TurboQuant K+1 spec-verify routing (fixes #40880)#40914
[Bugfix][Spec-Decode] TurboQuant K+1 spec-verify routing (fixes #40880)#40914Sandermage wants to merge 2 commits intovllm-project:mainfrom
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This pull request implements a routing fix for TurboQuant K+1 speculative verification to address CUDA graph compatibility issues caused by GPU-CPU synchronization. It introduces a new test suite and updates the attention backend to route uniform-query batches through the decode kernel. A critical issue was identified where the new path fails to reuse cached decode buffers, leading to dynamic allocations that would break CUDA graph replay.
| if _spec_verify_eligible: | ||
| K_PLUS_1 = attn_metadata.max_query_len | ||
| B = N // K_PLUS_1 | ||
| if attn_metadata.query_start_loc.shape[0] == B + 1: | ||
| from vllm.v1.attention.ops.triton_turboquant_decode import ( | ||
| triton_turboquant_decode_attention, | ||
| ) | ||
| # Build synth args mirroring _continuation_prefill's pattern: | ||
| # synth_seq_lens[req*K1+i] = base_seq_lens[req] - K1 + 1 + i | ||
| # synth_block_table[req*K1+i] = block_table[req] | ||
| # All GPU ops — cudagraph-safe. | ||
| _q_flat = q[:N].view(N, self.num_heads, self.head_size) | ||
| _offs = torch.arange( | ||
| K_PLUS_1, device=q.device, | ||
| dtype=attn_metadata.seq_lens.dtype, | ||
| ) | ||
| _synth_seq_lens = ( | ||
| attn_metadata.seq_lens[:B, None] - K_PLUS_1 + 1 + _offs[None, :] | ||
| ).reshape(-1) | ||
| _synth_block_table = attn_metadata.block_table[:B].repeat_interleave( | ||
| K_PLUS_1, dim=0, | ||
| ) | ||
| attn_out = triton_turboquant_decode_attention( | ||
| query=_q_flat, | ||
| kv_cache=kv_cache, | ||
| block_table=_synth_block_table, | ||
| seq_lens=_synth_seq_lens, | ||
| Pi=Pi, | ||
| centroids=centroids, | ||
| scale=self.scale, | ||
| mse_bits=self.tq_config.key_mse_bits, | ||
| key_packed_size=self.tq_config.key_packed_size, | ||
| value_quant_bits=self.tq_config.effective_value_quant_bits, | ||
| key_fp8=self.tq_config.key_fp8, | ||
| norm_correction=self.tq_config.norm_correction, | ||
| PiT=PiT, | ||
| ) | ||
| return attn_out |
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The new routing path for speculative verification does not reuse the cached decode buffers (mid_o_buf, output_buf, lse_buf) from the layer object, nor does it pass the buf_holder or max_num_kv_splits parameters to triton_turboquant_decode_attention.
This will cause the kernel to allocate new tensors on every call, which is a significant performance overhead in the hot path and, more importantly, breaks CUDA graph compatibility because dynamic allocations are not allowed during graph replay. Since this PR specifically aims to restore FULL_AND_PIECEWISE CUDA graph support, ensuring static buffer reuse is critical.
if _spec_verify_eligible:
K_PLUS_1 = attn_metadata.max_query_len
B = N // K_PLUS_1
if attn_metadata.query_start_loc.shape[0] == B + 1:
from vllm.v1.attention.ops.triton_turboquant_decode import (
triton_turboquant_decode_attention,
)
# Build synth args mirroring _continuation_prefill's pattern:
# synth_seq_lens[req*K1+i] = base_seq_lens[req] - K1 + 1 + i
# synth_block_table[req*K1+i] = block_table[req]
# All GPU ops — cudagraph-safe.
_offs = torch.arange(
K_PLUS_1, device=q.device,
dtype=attn_metadata.seq_lens.dtype,
)
_synth_seq_lens = (
attn_metadata.seq_lens[:B, None] - K_PLUS_1 + 1 + _offs[None, :]
).reshape(-1)
_synth_block_table = attn_metadata.block_table[:B].repeat_interleave(
K_PLUS_1, dim=0,
)
# Reuse cached decode buffers from the layer to avoid re-allocation
# and ensure CUDA graph compatibility.
mid_o_buf = getattr(layer, "_tq_mid_o_buf", None)
output_buf = getattr(layer, "_tq_output_buf", None)
lse_buf = getattr(layer, "_tq_lse_buf", None)
attn_out = triton_turboquant_decode_attention(
query=q,
kv_cache=kv_cache,
block_table=_synth_block_table,
seq_lens=_synth_seq_lens,
Pi=Pi,
centroids=centroids,
scale=self.scale,
mse_bits=self.tq_config.key_mse_bits,
key_packed_size=self.tq_config.key_packed_size,
value_quant_bits=self.tq_config.effective_value_quant_bits,
key_fp8=self.tq_config.key_fp8,
norm_correction=self.tq_config.norm_correction,
PiT=PiT,
mid_o_buf=mid_o_buf,
output_buf=output_buf,
lse_buf=lse_buf,
buf_holder=layer,
max_num_kv_splits=self.max_num_kv_splits,
)
return attn_out
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Thanks @gemini-code-assist for catching this — you're right and the fix is critical: without buffer reuse the routing path would allocate dynamically on every call, breaking the CUDA graph replay this PR is supposed to enable. Embarrassing miss on my part since the existing Pushed I'll re-verify on the production rig (Qwen3.6-35B-A3B-FP8 + 2× A5000) and update the empirical numbers in the PR body if the routing is now even faster than the original 75.6 tok/s measurement. |
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Thanks for the update, @Sandermage. The fix looks solid, and reusing the layer's cached buffers is the correct approach to maintain CUDA graph compatibility. Since you've verified the performance improvement and confirmed the fix for the degenerate token cascade, this looks ready for further integration testing. Great work on the architectural fix. |
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Production validation of the buffer-reuse fix ( Re-tested the equivalent fix on our production rig (Qwen3.6-35B-A3B-FP8 + 2× RTX A5000 + MTP num_speculative_tokens=3). Posting numbers as confirmation that the fix not only restores cudagraph correctness but also measurably improves wall-clock perf (eliminating per-call dynamic allocation overhead):
12 runs each, single-stream free-form prompts, 300 max_tokens, temperature=0.7. So the original "+32% over baseline" claim becomes more like +128% over PIECEWISE workaround with the buffer-reuse fix in place. CV (5.0%) is the lowest we've measured across any spec-decode config — confirms the cudagraph capture is genuinely stable now. Long-context regression check (252K-token needle recall): 4/4 PASS on the same 180K / 216K / 237K / 252K context ladder, no degradation from the routing path. Will also retest with the matching fix in our companion patch (P67b in Cross-arch validators on Hopper / Blackwell still very welcome — the routing path is architecturally agnostic but I can only claim Ampere SM 8.6 today. |
…project#40880) Fixes vllm-project#40880 (degenerate token cascade on Qwen3.6-MoE under MTP=3 + FULL_AND_PIECEWISE cudagraph + TurboQuant k8v4 KV cache). ROOT CAUSE ---------- When speculative decoding (MTP num_speculative_tokens=K>0) is active, the verify pass produces uniform-query batches with max_query_len=K+1 (e.g., K=3 -> q_len=4 per request) where max_seq_len > max_query_len (each request has prior cached KV). The default `_prefill_attention` continuation branch reads `query_start_loc.tolist()` which (1) forces a GPU->CPU sync incompatible with active CUDA stream capture, and (2) when paired with the spec-verify pattern produces incorrect attention to ONLY the current chunk (ignoring prior cached KV). Drafter and verifier converge on the high-bias `<tool_call>` token -> cascade output. Existing workarounds in the wild: - Surgical capture-guard via `is_current_stream_capturing()` check - vllm `cudagraph_mode=NONE` (disables FULL CG entirely, ~30% TPS cost) - Genesis project P65 (downgrades cudagraph to PIECEWISE for spec-decode) FIX --- Add a dispatch branch in `TurboQuantAttentionImpl.forward()` that detects uniform K+1 spec-verify batches and routes them through `triton_turboquant_decode_attention` via the same `synth_seq_lens` trick that `_continuation_prefill` uses internally: synth_seq_lens[req*K1+i] = base_seq_lens[req] - K1 + 1 + i synth_block_table[req*K1+i] = block_table[req] The decode kernel handles compressed K+V cache lookup natively, has no CPU sync, and is cudagraph-safe -- so this restores FULL_AND_PIECEWISE capture for spec-decode workloads while fixing the correctness bug. EMPIRICAL --------- +32% wall-clock TPS on Qwen3.6-35B-A3B-FP8 + MTP=3 + 2x RTX A5000 + TurboQuant k8v4 (75.6 tok/s vs 57.2 tok/s baseline with PIECEWISE downgrade workaround). Tool-call clean rate 18/18 on the same reproducer that reliably triggered vllm-project#40880 in older runs. CROSS-ARCH VALIDATION --------------------- Tested ONLY on NVIDIA Ampere SM 8.6 (RTX A5000 primary, RTX 3090 cross-rig). Cross-validation by other hardware owners welcome. Hopper / Blackwell not yet tested. REPRODUCER ---------- Public repository with full test harness + benchmark scripts: https://github.com/Sandermage/genesis-vllm-patches (v7.42-v7.44 patches; this PR uses the conservative routing-only approach. Genesis P67 implements an alternative custom Triton kernel for the same purpose.) TESTS ----- tests/v1/attention/test_turboquant_spec_verify.py: - synth_seq_lens shape/dtype tests - cudagraph capture safety test (the property that makes routing safe) - dispatch predicate test End-to-end correctness test (requires a TurboQuant model checkpoint) deferred to maintainer integration CI. A note from the contributor: I'm based in Odessa, Ukraine, and English is not my first language; some of this PR description went through machine-translation polishing. Please excuse any awkward phrasing. Signed-off-by: Sandermage <sander.odessa@gmail.com> Signed-off-by: Sander Barzov <sander.odessa@gmail.com>
Per gemini-code-assist review on this PR: the new spec-verify routing path was not passing `mid_o_buf` / `output_buf` / `lse_buf` / `buf_holder` / `max_num_kv_splits` to `triton_turboquant_decode_attention`. Without these, the kernel allocates fresh tensors on every call, which: 1. Adds dynamic allocation overhead in the hot path 2. Breaks CUDA graph replay (the very thing this PR aims to restore) Fix: forward the cached buffer references from the `layer` object (populated by `_ensure_on_device`), exactly as `_decode_attention` already does. Now the routing is fully cudagraph-safe and incurs no per-call allocation. Thanks to gemini-code-assist for catching this. Signed-off-by: Sander Barzov <sander.odessa@gmail.com>
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Adding a second Ampere SM 8.6 data point for the routing fix (cross-rig validation request from #issuecomment-4322050539). Setup: 2× NVIDIA RTX 3090, Qwen3.6-27B-AutoRound + MTP n=3 + TurboQuant K8V4 + 32K ctx, TP=2, --disable-custom-all-reduce. Genesis v7.48 with P67 + P67b + P78 enabled (P65 OFF — cudagraph_mode at FULL_AND_PIECEWISE). Result (bench: standard 800-word essay prompt × 1000 max_tokens × temperature=0.6, 5 measured runs after 3 warm-ups):
(Different model than @Sandermage's bench, so absolute TPS isn't directly comparable to his 130 TPS on Qwen3.6-35B-A3B-FP8. Stability is.) No regressions observed:
The CV of 3.9% on our hardware corroborates Sandermage's observation that the routing fix produces the most stable spec-decode capture path he's measured. From an Ampere consumer (3090) angle the patch is functionally correct and we'd be glad to see it merged. cc @Sandermage — patch tree at v7.48 with P67/P67b/P78 worked first-try on our 3090 box. Thanks for the careful work here. |
Cross-rig validation summary — promoting from draft to Ready-for-Review Two independent rigs now confirm this PR is safe + faster + lower-variance than baseline:
The buffer-reuse fix in commit Both rigs run the same Genesis v7.48 patch tree (P67 multi-query Triton kernel + P67b spec-verify routing + P78 .tolist() guard). @noonghunna's bench harness (qwen36-dual-3090/scripts/bench.sh v2) reports Marking Ready-for-Review and pinging @LucasWilkinson @WoosukKwon for spec-decode-side review when convenient. Happy to address any follow-up concerns or run additional benches. Special thanks to @noonghunna for the rapid cross-rig validation (both 27B and 35B-A3B variants in under 24 hours) — this is exactly the kind of independent reproduction that makes consumer-Ampere PRs reviewable. |
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requested review from
LucasWilkinson and
MatthewBonanni
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Cross-rig validation data point. Independent reproduction of this PR's approach via Genesis P67/P67b (architecturally equivalent — `USE_UPSTREAM=1` routes through the same `triton_turboquant_decode_attention` via the synthetic-args trick). Setup: single 3090 PCIe (no NVLink), Qwen3.6-27B AutoRound INT4 (Lorbus), MTP n=3, `max-num-seqs=1`, single-stream serving, `vllm/vllm-openai:nightly-07351e0883470724dd5a7e9730ed10e01fc99d08` (= `dev205+g07351e088`). 5 measured runs after 3 warmups.
Cross-rig comparison:
Tool-call correctness preserved cross-rig — `tool_calls[]` populates correctly, full functional verify-full pass. So functionally the PR is solid. However the headline +32% TPS gain doesn't transfer to consumer Ampere single-stream: at `B=1, max-num-seqs=1`, the K+1 spec-verify batch launches `B × Hk = 4 CTAs` per layer on RTX 3090's 84 SMs (~4.7% occupancy). At that occupancy launch/dispatch overhead dominates per-step latency, and the kernel-level routing change is masked. The PIECEWISE-eager path (Genesis v7.14 P65) and the synthetic-args path (this PR / Genesis P67) measure within run-to-run variance. Reviewers may want to consider:
Happy to re-run on TP=2 / multi-stream / different workload patterns if useful for review. |
PR #40914 Cross-Validation — Nemotron-H 120B on 8× A4000Cross-architecture and cross-hardware validation of this fix. Tested on Nemotron-3-Super-120B-AWQ-4bit (hybrid Mamba+MoE+Attention, 88 layers with 8 attention) on 8× RTX A4000 (SM86 Ampere), CUDA 13.0 driver 580.76.05, vLLM 0.20.0 build with the diff cleanly applied. Result: Patch works as advertised, restores CUDA graph captureWithout the patch, n-gram spec decoding crashes during CUDA graph capture (the Throughput data (single-request decode, max_tokens=1000, temperature=0)Workload-specific results — n-gram speculation is highly sensitive to output predictability:
Spec config: The +201% on highly repetitive output mirrors the author's +32% on Qwen3.6-35B-A3B-FP8 — bigger lift here likely because (a) the prime-number prompt is maximally predictable for n-gram, and (b) the 12B-active Super-120B has more headroom for parallel verification than the 3B-active Qwen3.6-A3B. The negative result on diverse workloads is expected n-gram behavior (the verification cost dominates when guesses miss), not a flaw in this PR. Without this patch, neither result is achievable on Ampere with CUDA graphs enabled. Confirmed: spec-decode is only viable on Ampere if this PR landsWe tried Tested patch as of commit on — MidasMining, 8× RTX A4000 / Nemotron-3-Super-120B / vLLM v0.20.0 |
3 participants
Summary
Fixes #40880 (degenerate token cascade on Qwen3.6-MoE under MTP=3 + FULL_AND_PIECEWISE cudagraph + TurboQuant k8v4 KV cache).
Adds a dispatch branch in
TurboQuantAttentionImpl.forward()that detects uniform K+1 spec-verify batches and routes them throughtriton_turboquant_decode_attentionvia thesynth_seq_lenstrick (same pattern_continuation_prefilluses internally). RestoresFULL_AND_PIECEWISEcudagraph for spec-decode while fixing the correctness bug.Root cause
When speculative decoding (
num_speculative_tokens=K>0) is active, the verify pass produces uniform-query batches withmax_query_len = K+1(e.g., MTP K=3 → q_len=4 per request) wheremax_seq_len > max_query_len(each request has prior cached KV).The default
_prefill_attentioncontinuation branch readsquery_start_loc.tolist()which:Drafter and verifier converge on the same high-bias special token (e.g.
<tool_call>) → cascade output. Reproducer well-documented in #40880 with multi-rig confirmation.Existing workarounds in the wild
These all work but trade off correctness vs throughput:
is_current_stream_capturing()check (e.g. @noonghunna'spatch_tolist_cudagraph.py)cudagraph_mode=NONE— disables FULL CG entirely, ~30% TPS costThis PR replaces all three with a proper architectural fix.
Fix design
The decode kernel:
.tolist()needed)_continuation_prefill's internal useEmpirical results
Hardware: 2× RTX A5000 (Ampere SM 8.6), TP=2, Qwen3.6-35B-A3B-FP8, MTP num_speculative_tokens=3, TurboQuant k8v4 KV cache.
Reproducer + full benchmark scripts: https://github.com/Sandermage/genesis-vllm-patches (v7.42-v7.44).
Cross-arch validation
Hopper / Blackwell not yet tested. Validators with that hardware would be very welcome — the routing path is architecturally agnostic (
triton_turboquant_decode_attentionalready runs on all CUDA arches), but I can't claim cross-arch correctness without empirical data.Tests
tests/v1/attention/test_turboquant_spec_verify.py:test_synth_seq_lens_shape— verifies the(B*K_PLUS_1,)reshape produces the expected per-request patterntest_synth_dtypes_preserved— int32/int64 dtype preservationtest_synth_construction_no_cpu_sync— runs synth construction insidetorch.cuda.graph()capture (the property that makes routing safe)test_eligibility_predicate— eligibility checks for K+1=4, K+1=1 (decode), no-prior-cache, oversized K+1End-to-end correctness test (requires a Qwen3.6 / TurboQuant model checkpoint) deferred to maintainer integration CI.
Companion patches in our project (not in this PR)
For context, our public repo ships an alternative custom Triton kernel approach (
P67/P67bin https://github.com/Sandermage/genesis-vllm-patches) which delivered the same 75.6 tok/s. This PR uses the conservative routing-only approach (no new kernel code) because it minimizes the diff and reuses upstream's proven decode kernel. Either is functionally equivalent for the bug fix.Stakeholders / for awareness
patch_tolist_cudagraph.pywas the first capture-guard prototype in the wild.Test plan
<tool_call>cascade reproducer from [Bug]: MTP × TurboQuant × CUDA graph capture produces degenerate output on Qwen3-Next hybrid (not closed by v7.13 ngram fix tree) #40880)A note from the contributor: I'm based in Odessa, Ukraine, and English is not my first language. Some of this PR description went through machine-translation polishing — please excuse any awkward phrasing.