cpu: riscv: gemm: add f32 gemm SIMD optimization with RISC-V V Extension#3785

Merged

mgouicem merged 4 commits intouxlfoundation:mainfrom

xiazhuozhao:rvv-gemm

Sep 26, 2025

Commits on Sep 3, 2025

cpu: rv64: gemm: add f32 gemm SIMD optimization with RISC-V V Extension

xiazhuozhao
and
zhangfeiv0
committed
cpu: riscv: optimize and stabilize f32 gemm performance

xiazhuozhao
and
zhangfeiv0
committed
cpu: riscv: address review feedback for rvv_gemm_f32

xiazhuozhao
and
zhangfeiv0
committed

Commits on Sep 9, 2025

cpu: riscv: gemm: include c_types_map.hpp for dim_t type

xiazhuozhao
and
dzarukin
authored