Skip to content

cpu: riscv: gemm: add f32 gemm SIMD optimization with RISC-V V Extension #3785

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
mgouicem merged 4 commits into from
Sep 26, 2025

cpu: riscv: gemm: include c_types_map.hpp for dim_t type

0beb782
Select commit
Loading
Failed to load commit list.
Sign in for the full log view
Merged

cpu: riscv: gemm: add f32 gemm SIMD optimization with RISC-V V Extension #3785

cpu: riscv: gemm: include c_types_map.hpp for dim_t type
0beb782
Select commit
Loading
Failed to load commit list.

The logs for this run have expired and are no longer available.