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[AMD] Disable LLVM vector combine pass #9260

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Merged
antiagainst merged 2 commits into from
May 12, 2026
Merged

[AMD] Disable LLVM vector combine pass #9260

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c67b24a
[AMD] Add a knob to disable vector combine pass
antiagainst Jan 21, 2026
8b0f0d7
Drop the knob to make it always disabled
antiagainst May 8, 2026
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18 changes: 16 additions & 2 deletions python/src/llvm.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -647,7 +647,7 @@ void init_triton_llvm(py::module &&m) {
"optimize_module",
[](llvm::Module *mod, const llvm::OptimizationLevel &opt,
std::string arch, std::string features, std::vector<std::string> flags,
bool enable_fp_fusion) {
bool enable_fp_fusion, bool disable_vector_combine) {
if (mlir::triton::tools::getBoolEnv("DISABLE_LLVM_OPT"))
return;
// Check to see if we are passing a list of flags to disable
Expand Down Expand Up @@ -678,11 +678,24 @@ void init_triton_llvm(py::module &&m) {
PassInstrumentationCallbacks passInstrCb;
StandardInstrumentations standardInstr(mod->getContext(),
/*DebugLogging*/ true);
bool enablePassInstrumentation = false;
if (disable_vector_combine) {
// VectorCombinePass::name() returns the C++ class name, not the
// registry name "vector-combine".
const StringRef kVectorCombinePassName = "VectorCombinePass";
passInstrCb.registerShouldRunOptionalPassCallback(
[kVectorCombinePassName](StringRef passName, Any) {
return passName != kVectorCombinePassName;
});
enablePassInstrumentation = true;
}
if (mlir::triton::tools::getBoolEnv("LLVM_IR_ENABLE_DUMP")) {
setLLVMOption<bool>("print-after-all", true);
standardInstr.registerCallbacks(passInstrCb, &mam);
instrCbPtr = &passInstrCb;
enablePassInstrumentation = true;
}
if (enablePassInstrumentation)
instrCbPtr = &passInstrCb;

PipelineTuningOptions tuningOptions;
tuningOptions.LoopUnrolling = true;
Expand Down Expand Up @@ -760,6 +773,7 @@ void init_triton_llvm(py::module &&m) {
py::arg("arch") = "", py::arg("features") = "",
py::arg("flags") = std::vector<std::string>{},
py::arg("enable_fp_fusion") = false,
py::arg("disable_vector_combine") = false,
py::call_guard<py::gil_scoped_release>());

m.def(
Expand Down
2 changes: 1 addition & 1 deletion third_party/amd/backend/compiler.py
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Expand Up @@ -479,7 +479,7 @@ def make_llir(src, metadata, options):
if len(paths) > 0:
llvm.link_extern_libs(llvm_mod, paths)

llvm.optimize_module(llvm_mod, llvm.OPTIMIZE_O3, options.arch, '', [], options.enable_fp_fusion)
llvm.optimize_module(llvm_mod, llvm.OPTIMIZE_O3, options.arch, '', [], options.enable_fp_fusion, True)

# Architectures with architected SGPRs store the workgroup id in ttmp9 (X) and ttmp7 (Y[15:0], Z[31:16]).
# These attributes are used to determine if Z should be masked out when loading Y. They are inferred during
Expand Down
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