Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

[rtl] minor timing and area optimizations #990

Merged
merged 10 commits into from
Aug 16, 2024
Merged

[rtl] minor timing and area optimizations #990

merged 10 commits into from
Aug 16, 2024

Conversation

stnolting
Copy link
Owner

@stnolting stnolting commented Aug 16, 2024 •
edited
Loading

  • upgrade TRNG to neoTRNG v3.1
  • improve timing of CPU's critical path (regfile -> ALU(add) -> regfile)
  • improve timing and area utilization of CPU's barrel shifter
  • improve area utilization of MUL/DIV unit
  • add missing reset to ASIC-style register-file read access
  • minor code cleanups

@stnolting stnolting added HW Hardware-related optimization Make things faster, smaller and more efficient labels Aug 16, 2024
@stnolting stnolting self-assigned this Aug 16, 2024
@stnolting stnolting marked this pull request as ready for review August 16, 2024 09:56
@stnolting stnolting merged commit 9b47b98 into main Aug 16, 2024
10 checks passed
@stnolting stnolting deleted the dev160824 branch August 16, 2024 14:45
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Reviewers
No reviews
Assignees

@stnolting stnolting

Labels
HW Hardware-related optimization Make things faster, smaller and more efficient
Projects
None yet
Milestone
No milestone
Development

Successfully merging this pull request may close these issues.
1 participant
@stnolting