Adjust 7260 buffer sizes to accomodate extra lossless queues #11018
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Signed-off-by: Neetha John <[email protected]>
Signed-off-by: Neetha John <[email protected]>
…is enabled Signed-off-by: Neetha John <[email protected]>
neethajohn
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Request for 202012 Branch
Request for 202111 Branch
Signed-off-by: Neetha John <[email protected]>
Signed-off-by: Neetha John <[email protected]>
yxieca
previously approved these changes
Jun 3, 2022
baiwei0427
reviewed
Jun 3, 2022
src/sonic-config-engine/tests/sample_output/py3/buffer-arista7260-t1.json
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Signed-off-by: Neetha John <[email protected]>
Signed-off-by: Neetha John <[email protected]>
baiwei0427
approved these changes
Jun 3, 2022
lguohan
approved these changes
Jun 6, 2022
lguohan
pushed a commit
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Jun 6, 2022
…11018) Why I did it As part of PCBB changes, we need to enable 2 extra lossless queues. The changes in this PR are done to adjust only the reserved sizes on Th2 for the additional 2 lossless queues Calculations are done based on 40 downlinks for T1 and 16 uplinks for dual ToR How to verify it Verified that the rendering works fine on Th2 dut Unit tests have been updated to reflect the modified buffer sizes when pcbb is enabled. There are existing testcases that will test the original buffer sizes when pcbb is disabled. With these changes, was able to build sonic-config-engine wheel successfully Signed-off-by: Neetha John <[email protected]>
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for 202012 branch, only includes the template change, didn't include the unit tests. |
6 tasks
@lguohan @neethajohn looks like it's failing the sonic-config-gen test on 202012 branch if we do not update the unit test. |
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@stephenxs , you are right, i reverted that pr, and @neethajohn , can you generate a 202012 branch pr thanks. |
Thank you. |
This was referenced Jun 6, 2022
PR for 202012: #11050 |
neethajohn
added a commit
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Jun 7, 2022
…#11050) Backport changes from #11018 Signed-off-by: Neetha John <[email protected]> Why I did it As part of PCBB changes, we need to enable 2 extra lossless queues. The changes in this PR are done to adjust only the reserved sizes on Th2 for the additional 2 lossless queues Calculations are done based on 40 downlinks for T1 and 16 uplinks for dual ToR How to verify it Verified that the rendering works fine on Th2 dut Unit tests have been updated to reflect the modified buffer sizes when pcbb is enabled. There are existing testcases that will test the original buffer sizes when pcbb is disabled. With these changes, was able to build sonic-config-engine wheel successfully
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This commit could not be cleanly cherry-picked to 202012. Please submit another PR. |
yxieca
pushed a commit
that referenced
this pull request
Jun 23, 2022
…11018) Why I did it As part of PCBB changes, we need to enable 2 extra lossless queues. The changes in this PR are done to adjust only the reserved sizes on Th2 for the additional 2 lossless queues Calculations are done based on 40 downlinks for T1 and 16 uplinks for dual ToR How to verify it Verified that the rendering works fine on Th2 dut Unit tests have been updated to reflect the modified buffer sizes when pcbb is enabled. There are existing testcases that will test the original buffer sizes when pcbb is disabled. With these changes, was able to build sonic-config-engine wheel successfully Signed-off-by: Neetha John <[email protected]>
skbarista
pushed a commit
to skbarista/sonic-buildimage
that referenced
this pull request
Aug 17, 2022
…onic-net#11018) Why I did it As part of PCBB changes, we need to enable 2 extra lossless queues. The changes in this PR are done to adjust only the reserved sizes on Th2 for the additional 2 lossless queues Calculations are done based on 40 downlinks for T1 and 16 uplinks for dual ToR How to verify it Verified that the rendering works fine on Th2 dut Unit tests have been updated to reflect the modified buffer sizes when pcbb is enabled. There are existing testcases that will test the original buffer sizes when pcbb is disabled. With these changes, was able to build sonic-config-engine wheel successfully Signed-off-by: Neetha John <[email protected]>
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Why I did it
As part of PCBB changes, we need to enable 2 extra lossless queues. The changes in this PR are done to adjust only the reserved sizes on Th2 for the additional 2 lossless queues
Calculations are done based on 40 downlinks for T1 and 16 uplinks for dual ToR
How to verify it
Which release branch to backport (provide reason below if selected)