Added DMA configurable timeout register #1246
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@ruck314 I think I also need to set 'timeout' register here: https://github.com/slaclab/axi-pcie-core/blob/211890d800e999ea496442d8b279f983c9d89734/protocol/gpuAsync/rtl/AxiPcieGpuAsyncControl.vhd#L302. Do you agree? |
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@mmishra9 Let me know when you have completed your building and regression testing with hardware. After you are done with that, then I will approve and merge the PR. |
ruck314
changed the title
Co-authored-by: Jeremy L. <[email protected]>
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Also getting a build error from missing |
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The issues should be fixed now. |
| v.axiWriteMaster.wdata(3) := dmaWrDescRet(descIndex).continue; | ||
| v.axiWriteMaster.wdata(2 downto 0) := dmaWrDescRet(descIndex).result; | ||
| v.axiWriteMaster.wdata(7 downto 5) := (others => '0'); | ||
| v.axiWriteMaster.wdata(4) := dmaWrDescRet(descIndex).continue; |
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@mmishra9 I am worried about backwards compatibly with his change
@JJL772 & @slacrherbst What's your opinion about this change?
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How about like this?
v.axiWriteMaster.wdata(7 downto 5) := (others => '0');
v.axiWriteMaster.wdata(4) := dmaWrDescRet(descIndex).result(3);
v.axiWriteMaster.wdata(3) := dmaWrDescRet(descIndex).continue;
v.axiWriteMaster.wdata(2 downto 0) := dmaWrDescRet(descIndex).result(2 downto 0);__
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As long as there is a way to change behavior based on firmware version it's okay with me. Might require some ugly code in the driver though.
Added configurable timeout register to acknowledge the timeout
Description
Added a configurable timeout register which was earlier hardcoded. If timeout reg value is reached before the write transactions are completed, the descriptor is returned.