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[Feat] KVShard: Add attention and indexer support for page-sharded DSA caches - #44280
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- Sharded indexer-K writes take main's act_quant + set_index_k_scale_buffer fallback, i.e. the sharded pool's store_quantized; revert the Triton act_quant use_fused_store_math flag. - Translate the DSA page table after the CP request slice, so the logical indexer page table needs no second slice. - Drop the no-op needs_cpu_seq_lens override and skip the pool-capacity check for scratch-addressed sharded extends. - Keep the sharded DSA pool's assert text; its docstring now only notes that model-runner selection is still pending. - Tests: replace the mock routing tests and the Triton parity test with one real-kernel writer test, and keep a single 4-GPU real-indexer run. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Factor the sharded index-key write plan (stage every token in scratch, persist owned tokens locally) out of store_quantized into write_targets, and run fused_store_index_k_cache / fused_k_indexer_norm_rope_store over those targets. Sharded indexer keys now carry the same FP32 scales and bytes as an unsharded pool instead of the ue8m0 act_quant fallback, with no Triton change. The writer test compares against the unsharded CUDA writer byte for byte. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Conflicts with main's DSA decode context parallelism (sgl-project#43735): - dsa_indexer.py _store_index_k_cache: the fused writer loop over _index_k_write_targets now passes pool.index_page_size, as main's single call does. It equals page_size on a sharded pool (index_kpool == 1, no DCP). - dsa_backend.py __init__: supports_mha_one_shot needs both dcp_size == 1 (main) and no KV-shard pool (this branch). sgl-project#43735 also broke two hand-built fixtures in test_page_sharded_dsa_attention.py. Both are patched the way main patched its own: - The writer test builds DSATokenToKVPool without a published topology, and the constructor now reads attn_dcp_size. Fix: get_parallel().override(attn_dcp_size=1) in setUp. - The __new__-built backend now needs dcp_size and num_dcp_q_heads, which _forward_trtllm reads in the 4-GPU TRT-LLM case (SM100 only). Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Normal startup still needs two integration points for DSA page sharding:
The new tests construct the sharded pool directly, so they do not exercise this startup path. The pool docstring already marks selection as pending; if this is intentionally deferred, could the PR description identify the follow-up that will wire these entry points? |
Thank you for the comments. The final E2E integration will be done with next PR. In this PR, I will only modify the attention part. |
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Preserve sharded index-key write targets with the renamed DSA cache kernel and update attention tests to the relocated act_quant module.
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Resolve conflicts with bf16 V4.1 index logits (sgl-project#44051, sgl-project#45880), grouped verify rows (sgl-project#45251), the two-level-only prefill graph (sgl-project#45783) and KV-shard index-K writes (sgl-project#44280): the adapter takes a logits_dtype and maps [batch, next_n] paged queries and schedules to grouped varlen rows on SM100. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

Motivation
This PR integrates DSA attention and indexer operations with page-sharded KV caches for GLM-5.2. It separates logical page IDs from scratch addresses and routes fused indexer writes to both scratch and owner-local persistent storage while preserving existing quantization behavior. DSA and indexer fixtures and tests are consolidated into the attention test module, keeping general page-sharding coverage separate.
Modifications
Accuracy Tests
Speed Tests and Profiling
Checklist
Review and Merge Process
/tag-and-rerun-ci,/tag-run-ci-label,/rerun-failed-ciCI States
Latest PR Test (Base): ⏳ Run #39713318009
Latest PR Test (Extra): ⏳ Run #39713318067
Latest PR Test (AMD ROCm 10): ❌ Run #39713317998