[diffusion] Simplify Kandinsky 6 models, SR sampling and tests

[mickqian]

Motivation

Follow-up to #42743. Simplify native Kandinsky 6 without removing model capabilities.

Modifications

• Share text/video/SR block construction, QKV projection setup and TP/SP validation, preserving checkpoint names and numerical paths.
• Remove forwarding-only wrappers and single-use helpers. Consolidate SR stages while retaining separate component lifetimes; keep video I/O and resize together.
• Reuse audio residual stacks and final inference vocoder layout. Share causal VAE segmentation without changing cached convolution boundaries.
• Keep sampling arithmetic and temporary-tensor lifetimes unchanged. Use native attention dispatch; standalone tests now supply forward context instead of relying on a silent SDPA fallback.
• Consolidate fixtures and request/loader tests; document the checkpoint scheduler as the source of sampler settings.

Net reduction: 1,943 production lines and 887 test lines. Cumulative production Python additions for the original feature plus this cleanup: 7,996 lines, measured against the parent of #42743's merge commit, excluding tests/docs. This is added lines, not net additions.

Accuracy Tests

RTX PRO 6000, head ccf78e44393. Numerical and full SR checks ran on 589ee91bf50; the final commit changes only two tests, with identical production code.

• 450 passed, 17 skipped, including Kandinsky and H3/Qwen state-isolation regressions in one process. Skips cover multi-GPU cases, FA on SM120 and the optional external reference package.
• 24 video/joint/SR DiT configurations match frozen eb848abed80a exactly: strict checkpoint keys, FP32/BF16, two patch sizes, batch 1/2 and repeated forwards.
• 192 latent/RNG, 96 PiFlow, 32 native DiT multi-chunk/repeated-request and 12 tiny full SR stage-chain configurations match frozen 2189b9c5f40 exactly.
• 1,280 causal segment partitions, 14 VAE configurations and 12 x2/x4 upscaler configurations match the pre-change implementation exactly, including repeated FP32/BF16 encode/decode.
• Official audio checkpoint: strict tensor loading, encoder posterior, mel and repeated waveform output remain exact in FP32/BF16.
• Full SR checkpoint: two consecutive 121-frame requests, 768x512 input, x2 output, BF16/SDPA, seed 42, tile batch 1, serial/resident. Raw RGB/audio match the saved pre-cleanup baseline exactly.
• Separate two-GPU joint/SR forwards pass for Ulysses2 and TP2 on the final head, retaining the original tolerances (rtol=0.02, atol=0.002).
• Pre-commit and diff checks pass.

Earlier TP/Ulysses/Ring configuration validation on 120a04688cb covered 1,200 accept/reject combinations. Ring execution remains unverified: SM120 resolves FA to SDPA without the required LSE.

Speed Tests and Profiling

No acceleration claim. The two full SR requests took 134.65s / 133.36s, with unchanged PyTorch peak allocated/reserved memory (34,860.76 / 48,828 MiB). Full video E2E, Hopper and four-GPU validation have not been rerun for this head.

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CI States

Latest PR Test (Base): ✅ Run #37500158172
Latest PR Test (Extra): ❌ Run #37500157706
Latest PR Test (AMD ROCm 10): ❌ Run #37500158002

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